build: move include paths where they belong
They're _not_ part of the compiler binary, so they have no place in $(CC_*) Change-Id: I1e1c3c0be6f75629450a824ea834e1614d48ed9b Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5785 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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@ -256,7 +256,7 @@ $(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s
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$(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h
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@printf " CC $(subst $(obj)/,,$(@))\n"
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$(CC_romstage) $(CPPFLAGS) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
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$(CC_romstage) $(CPPFLAGS) $(CPPFLAGS_x86_32) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
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endif # CONFIG_ARCH_ROMSTAGE_X86_32
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@ -48,8 +48,6 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
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export AGESA_ROOT
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export AGESA_INC
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export AGESA_CFLAGS
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CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)
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CPPFLAGS_x86_32 += $(AGESA_INC)
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CFLAGS_x86_32 += $(AGESA_CFLAGS)
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@ -83,8 +83,6 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st
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export AGESA_ROOT := $(AGESA_ROOT)
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export AGESA_INC := $(AGESA_INC)
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export AGESA_CFLAGS := $(AGESA_CFLAGS)
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CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)
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CPPFLAGS_x86_32 += $(AGESA_INC)
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CFLAGS_x86_32 += $(AGESA_CFLAGS)
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#######################################################################
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@ -67,10 +67,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st
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export AGESA_ROOT := $(AGESA_ROOT)
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export AGESA_INC := $(AGESA_INC)
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export AGESA_CFLAGS := $(AGESA_CFLAGS)
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CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)
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CPPFLAGS_x86_32 += $(AGESA_INC)
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CFLAGS_x86_32 += $(AGESA_CFLAGS)
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#######################################################################
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classes-y += libagesa
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@ -516,7 +516,5 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
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export AGESA_ROOT
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export AGESA_INC
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export AGESA_CFLAGS
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CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)
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CPPFLAGS_x86_32 += $(AGESA_INC)
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CFLAGS_x86_32 += $(AGESA_CFLAGS)
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@ -80,10 +80,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st
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export AGESA_ROOT := $(AGESA_ROOT)
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export AGESA_INC := $(AGESA_INC)
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export AGESA_CFLAGS := $(AGESA_CFLAGS)
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CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)
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CPPFLAGS_x86_32 += $(AGESA_INC)
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CFLAGS_x86_32 += $(AGESA_CFLAGS)
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#######################################################################
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classes-y += libagesa
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@ -82,8 +82,6 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st
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export AGESA_ROOT := $(AGESA_ROOT)
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export AGESA_INC := $(AGESA_INC)
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export AGESA_CFLAGS := $(AGESA_CFLAGS)
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CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
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CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)
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CPPFLAGS_x86_32 += $(AGESA_INC)
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CFLAGS_x86_32 += $(AGESA_CFLAGS)
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#######################################################################
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@ -114,10 +114,8 @@ export CIMX_ROOT
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export NB_CIMX_INC
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export NB_CIMX_CFLAGS
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CC_bootblock := $(CC_bootblock) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC)
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CC_romstage := $(CC_romstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC)
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CC_ramstage := $(CC_ramstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC)
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CC_x86_32 := $(CC_x86_32) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC)
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CPPFLAGS_x86_32 += $(NB_CIMX_INC)
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CFLAGS_x86_32 += $(NB_CIMX_CFLAGS)
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#######################################################################
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@ -68,14 +68,10 @@ ramstage-y += SMM.c
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ramstage-y += USB.c
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ramstage-y += LEGACY.c
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SB_CIMX_CFLAGS =
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export CIMX_ROOT
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export SB_CIMX_INC
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export SB_CIMX_CFLAGS
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CC_bootblock := $(CC_bootblock) $(SB_CIMX_INC)
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CC_romstage := $(CC_romstage) $(SB_CIMX_INC)
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CC_ramstage := $(CC_ramstage) $(SB_CIMX_INC)
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CC_x86_32 := $(CC_x86_32) $(SB_CIMX_INC)
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CPPFLAGS_x86_32 += $(SB_CIMX_INC)
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#######################################################################
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@ -79,10 +79,7 @@ CIMX_CFLAGS =
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export CIMX_ROOT
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export CIMX_INC
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export CIMX_CFLAGS
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CC_bootblock := $(CC_bootblock) $(CIMX_INC)
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CC_romstage := $(CC_romstage) $(CIMX_INC)
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CC_ramstage := $(CC_ramstage) $(CIMX_INC)
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CC_x86_32 := $(CC_x86_32) $(CIMX_INC)
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CPPFLAGS_x86_32 += $(CIMX_INC)
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#######################################################################
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@ -82,10 +82,7 @@ CIMX_CFLAGS =
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export CIMX_ROOT
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export CIMX_INC
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export CIMX_CFLAGS
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CC_bootblock := $(CC_bootblock) $(CIMX_INC)
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CC_romstage := $(CC_romstage) $(CIMX_INC)
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CC_ramstage := $(CC_ramstage) $(CIMX_INC)
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CC_x86_32 := $(CC_x86_32) $(CIMX_INC)
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CPPFLAGS_x86_32 += $(CIMX_INC)
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#######################################################################
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@ -23,8 +23,5 @@ FSP_SRC_FILES := $(wildcard src/vendorcode/intel/$(FSP_PATH)srx/*.c)
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FSP_C_INPUTS := $(foreach file, $(FSP_SRC_FILES), $(FSP_PATH)srx/$(notdir $(file)))
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ramstage-y += $(FSP_C_INPUTS)
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CC_bootblock := $(CC_bootblock) -Isrc/vendorcode/intel/$(FSP_PATH)include
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CC_romstage := $(CC_romstage) -Isrc/vendorcode/intel/$(FSP_PATH)include
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CC_ramstage := $(CC_ramstage) -Isrc/vendorcode/intel/$(FSP_PATH)include
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CC_x86_32 := $(CC_x86_32) -Isrc/vendorcode/intel/$(FSP_PATH)include
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CFLAGS_x86_32 += -Isrc/vendorcode/intel/$(FSP_PATH)include
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endif
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