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build: move include paths where they belong 

They're _not_ part of the compiler binary, so they have
no place in $(CC_*)

Change-Id: I1e1c3c0be6f75629450a824ea834e1614d48ed9b
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/5785
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Patrick Georgi 2014-05-18 23:04:27 +02:00
parent 2313c8bb65
commit e3927436c6
12 changed files with 19 additions and 46 deletions
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2
src/arch/x86/Makefile.inc
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@ -256,7 +256,7 @@ $(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s
$(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h
@printf " CC $(subst $(obj)/,,$(@))\n" @printf " CC $(subst $(obj)/,,$(@))\n"
$(CC_romstage) $(CPPFLAGS) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ $(CC_romstage) $(CPPFLAGS) $(CPPFLAGS_x86_32) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
endif # CONFIG_ARCH_ROMSTAGE_X86_32 endif # CONFIG_ARCH_ROMSTAGE_X86_32

6
src/vendorcode/amd/agesa/f10/Makefile.inc
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@ -48,8 +48,6 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
export AGESA_ROOT export AGESA_ROOT
export AGESA_INC export AGESA_INC
export AGESA_CFLAGS export AGESA_CFLAGS
CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) CPPFLAGS_x86_32 += $(AGESA_INC)
CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) CFLAGS_x86_32 += $(AGESA_CFLAGS)
CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)

6
src/vendorcode/amd/agesa/f12/Makefile.inc
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@ -83,8 +83,6 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st
export AGESA_ROOT := $(AGESA_ROOT) export AGESA_ROOT := $(AGESA_ROOT)
export AGESA_INC := $(AGESA_INC) export AGESA_INC := $(AGESA_INC)
export AGESA_CFLAGS := $(AGESA_CFLAGS) export AGESA_CFLAGS := $(AGESA_CFLAGS)
CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) CPPFLAGS_x86_32 += $(AGESA_INC)
CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) CFLAGS_x86_32 += $(AGESA_CFLAGS)
CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)
####################################################################### #######################################################################

6
src/vendorcode/amd/agesa/f14/Makefile.inc
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@ -67,10 +67,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st
export AGESA_ROOT := $(AGESA_ROOT) export AGESA_ROOT := $(AGESA_ROOT)
export AGESA_INC := $(AGESA_INC) export AGESA_INC := $(AGESA_INC)
export AGESA_CFLAGS := $(AGESA_CFLAGS) export AGESA_CFLAGS := $(AGESA_CFLAGS)
CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) CPPFLAGS_x86_32 += $(AGESA_INC)
CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) CFLAGS_x86_32 += $(AGESA_CFLAGS)
CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)
####################################################################### #######################################################################
classes-y += libagesa classes-y += libagesa

6
src/vendorcode/amd/agesa/f15/Makefile.inc
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@ -516,7 +516,5 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
export AGESA_ROOT export AGESA_ROOT
export AGESA_INC export AGESA_INC
export AGESA_CFLAGS export AGESA_CFLAGS
CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) CPPFLAGS_x86_32 += $(AGESA_INC)
CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) CFLAGS_x86_32 += $(AGESA_CFLAGS)
CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)

6
src/vendorcode/amd/agesa/f15tn/Makefile.inc
View File

@ -80,10 +80,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st
export AGESA_ROOT := $(AGESA_ROOT) export AGESA_ROOT := $(AGESA_ROOT)
export AGESA_INC := $(AGESA_INC) export AGESA_INC := $(AGESA_INC)
export AGESA_CFLAGS := $(AGESA_CFLAGS) export AGESA_CFLAGS := $(AGESA_CFLAGS)
CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) CPPFLAGS_x86_32 += $(AGESA_INC)
CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) CFLAGS_x86_32 += $(AGESA_CFLAGS)
CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)
####################################################################### #######################################################################
classes-y += libagesa classes-y += libagesa

6
src/vendorcode/amd/agesa/f16kb/Makefile.inc
View File

@ -82,8 +82,6 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st
export AGESA_ROOT := $(AGESA_ROOT) export AGESA_ROOT := $(AGESA_ROOT)
export AGESA_INC := $(AGESA_INC) export AGESA_INC := $(AGESA_INC)
export AGESA_CFLAGS := $(AGESA_CFLAGS) export AGESA_CFLAGS := $(AGESA_CFLAGS)
CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) CPPFLAGS_x86_32 += $(AGESA_INC)
CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) CFLAGS_x86_32 += $(AGESA_CFLAGS)
CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)
####################################################################### #######################################################################

6
src/vendorcode/amd/cimx/rd890/Makefile.inc
View File

@ -114,10 +114,8 @@ export CIMX_ROOT
export NB_CIMX_INC export NB_CIMX_INC
export NB_CIMX_CFLAGS export NB_CIMX_CFLAGS
CC_bootblock := $(CC_bootblock) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) CPPFLAGS_x86_32 += $(NB_CIMX_INC)
CC_romstage := $(CC_romstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) CFLAGS_x86_32 += $(NB_CIMX_CFLAGS)
CC_ramstage := $(CC_ramstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC)
CC_x86_32 := $(CC_x86_32) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC)
####################################################################### #######################################################################

6
src/vendorcode/amd/cimx/sb700/Makefile.inc
View File

@ -68,14 +68,10 @@ ramstage-y += SMM.c
ramstage-y += USB.c ramstage-y += USB.c
ramstage-y += LEGACY.c ramstage-y += LEGACY.c
SB_CIMX_CFLAGS =
export CIMX_ROOT export CIMX_ROOT
export SB_CIMX_INC export SB_CIMX_INC
export SB_CIMX_CFLAGS export SB_CIMX_CFLAGS
CC_bootblock := $(CC_bootblock) $(SB_CIMX_INC) CPPFLAGS_x86_32 += $(SB_CIMX_INC)
CC_romstage := $(CC_romstage) $(SB_CIMX_INC)
CC_ramstage := $(CC_ramstage) $(SB_CIMX_INC)
CC_x86_32 := $(CC_x86_32) $(SB_CIMX_INC)
####################################################################### #######################################################################

5
src/vendorcode/amd/cimx/sb800/Makefile.inc
View File

@ -79,10 +79,7 @@ CIMX_CFLAGS =
export CIMX_ROOT export CIMX_ROOT
export CIMX_INC export CIMX_INC
export CIMX_CFLAGS export CIMX_CFLAGS
CC_bootblock := $(CC_bootblock) $(CIMX_INC) CPPFLAGS_x86_32 += $(CIMX_INC)
CC_romstage := $(CC_romstage) $(CIMX_INC)
CC_ramstage := $(CC_ramstage) $(CIMX_INC)
CC_x86_32 := $(CC_x86_32) $(CIMX_INC)
####################################################################### #######################################################################

5
src/vendorcode/amd/cimx/sb900/Makefile.inc
View File

@ -82,10 +82,7 @@ CIMX_CFLAGS =
export CIMX_ROOT export CIMX_ROOT
export CIMX_INC export CIMX_INC
export CIMX_CFLAGS export CIMX_CFLAGS
CC_bootblock := $(CC_bootblock) $(CIMX_INC) CPPFLAGS_x86_32 += $(CIMX_INC)
CC_romstage := $(CC_romstage) $(CIMX_INC)
CC_ramstage := $(CC_ramstage) $(CIMX_INC)
CC_x86_32 := $(CC_x86_32) $(CIMX_INC)
####################################################################### #######################################################################

5
src/vendorcode/intel/Makefile.inc
View File

@ -23,8 +23,5 @@ FSP_SRC_FILES := $(wildcard src/vendorcode/intel/$(FSP_PATH)srx/*.c)
FSP_C_INPUTS := $(foreach file, $(FSP_SRC_FILES), $(FSP_PATH)srx/$(notdir $(file))) FSP_C_INPUTS := $(foreach file, $(FSP_SRC_FILES), $(FSP_PATH)srx/$(notdir $(file)))
ramstage-y += $(FSP_C_INPUTS) ramstage-y += $(FSP_C_INPUTS)
CC_bootblock := $(CC_bootblock) -Isrc/vendorcode/intel/$(FSP_PATH)include CFLAGS_x86_32 += -Isrc/vendorcode/intel/$(FSP_PATH)include
CC_romstage := $(CC_romstage) -Isrc/vendorcode/intel/$(FSP_PATH)include
CC_ramstage := $(CC_ramstage) -Isrc/vendorcode/intel/$(FSP_PATH)include
CC_x86_32 := $(CC_x86_32) -Isrc/vendorcode/intel/$(FSP_PATH)include
endif endif