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mb/intel/adlrvp_m: Disable unused TBT ports from device tree 

These PCIe and DMA ports are not available for adlrvp_m.

BUG=none
TEST=Boot device

Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Change-Id: Ic568c692fbb82fb3fc70c0cafc2328f8fa2cd74d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54885
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Bernardo Perez Priego 2021-05-24 14:32:19 -07:00 committed by Werner Zeh
parent c2c4a002ac
commit e3a079cff8
1 changed files with 3 additions and 3 deletions
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6
src/mainboard/intel/adlrvp/devicetree_m.cb
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@ -158,15 +158,15 @@ chip soc/intel/alderlake
device pci 06.2 on end # PEG62 device pci 06.2 on end # PEG62
device pci 07.0 on end # TBT_PCIe0 device pci 07.0 on end # TBT_PCIe0
device pci 07.1 on end # TBT_PCIe1 device pci 07.1 on end # TBT_PCIe1
device pci 07.2 on end # TBT_PCIe2 device pci 07.2 off end # TBT_PCIe2
device pci 07.3 on end # TBT_PCIe3 device pci 07.3 off end # TBT_PCIe3
device pci 08.0 off end # GNA device pci 08.0 off end # GNA
device pci 09.0 off end # NPK device pci 09.0 off end # NPK
device pci 0a.0 off end # Crash-log SRAM device pci 0a.0 off end # Crash-log SRAM
device pci 0d.0 on end # USB xHCI device pci 0d.0 on end # USB xHCI
device pci 0d.1 off end # USB xDCI (OTG) device pci 0d.1 off end # USB xDCI (OTG)
device pci 0d.2 on end # TBT DMA0 device pci 0d.2 on end # TBT DMA0
device pci 0d.3 on end # TBT DMA1 device pci 0d.3 off end # TBT DMA1
device pci 0e.0 off end # VMD device pci 0e.0 off end # VMD
device pci 10.0 off end device pci 10.0 off end
device pci 10.1 off end device pci 10.1 off end