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ryu: audio: Setup I2S1/DAP2 and EXTPERIPH1/MCLK muxes correctly 

This configures I2S1 and the codec MCLK muxes to pass the PCM
audio data to the RT5677 codec. Once depthcharge RT5677 codec
driver changes are in, audio 'beeps' should be heard on boot
(Ctrl-U / devmode/recmode).

BUG=chrome-os-partner:32582
BRANCH=none
TEST=Built and booted Ryu/A44.

Change-Id: I2143d544c75ee7e03ffc809561171920650e8d7d
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 600c12ddf3543d2dcb47fd3e2f0704803dac5957
Original-Change-Id: Ib071bcb41fba8f6d628a386ed233ec84a54b0323
Original-Signed-off-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/233945
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9580
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Tom Warren 2014-12-08 14:18:13 -07:00 committed by Patrick Georgi
parent 4633e0f671
commit e3a14326ee
1 changed files with 27 additions and 12 deletions
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39
src/mainboard/google/rush_ryu/mainboard.c
View File

@ -173,6 +173,21 @@ static int enable_lcd_vdd(void)
return 0; return 0;
} }
static const struct pad_config i2s1_pad[] = {
/* I2S1 */
PAD_CFG_SFIO(DAP2_SCLK, PINMUX_INPUT_ENABLE, I2S1),
PAD_CFG_SFIO(DAP2_FS, PINMUX_INPUT_ENABLE, I2S1),
PAD_CFG_SFIO(DAP2_DOUT, PINMUX_INPUT_ENABLE, I2S1),
PAD_CFG_SFIO(DAP2_DIN, PINMUX_INPUT_ENABLE | PINMUX_TRISTATE, I2S1),
/* codec MCLK via EXTPERIPH1 */
PAD_CFG_SFIO(DAP_MCLK1, PINMUX_PULL_NONE, EXTPERIPH1),
};
static const struct funit_cfg audio_funit[] = {
/* We need 1.5MHz for I2S1. So we use CLK_M */
FUNIT_CFG(I2S1, CLK_M, 1500, i2s1_pad, ARRAY_SIZE(i2s1_pad)),
};
static int configure_display_blocks(void) static int configure_display_blocks(void)
{ {
/* set and enable panel related vdd */ /* set and enable panel related vdd */
@ -188,24 +203,24 @@ static int configure_display_blocks(void)
/* Audio init: clocks and enables/resets */ /* Audio init: clocks and enables/resets */
static void setup_audio(void) static void setup_audio(void)
{ {
/* External peripheral 1: audio codec (RT5677) using 12MHz CLK1 */ /*
* External peripheral 1: audio codec (RT5677) uses 12MHz CLK1
* NOTE: We can't use a funits struct/call here because EXTPERIPH1/2/3
* don't have BASE regs or CAR RST/ENA bits. Also, the mux setting for
* EXTPERIPH1/DAP_MCLK1 is rolled into the I2S1 padcfg.
*/
clock_configure_source(extperiph1, CLK_M, 12000); clock_configure_source(extperiph1, CLK_M, 12000);
/* soc_configure_funits(audio_funit, ARRAY_SIZE(audio_funit));
* We need 1.5MHz for I2S1. So, we use CLK_M. CLK_DIVIDER macro
* returns a divisor (0xe) a little bit off from the ideal value (0xd),
* but it's good enough for beeps.
*/
clock_configure_source(i2s1, CLK_M, 1500);
clock_external_output(1); /* For external RT5677 audio codec. */ clock_external_output(1); /* For external RT5677 audio codec. */
/* /*
* Confirmed by NVIDIA hardware team, we need to take ALL audio devices * Confirmed by NVIDIA hardware team, we need to take ALL audio devices
* connected to AHUB (AUDIO, APBIF, I2S, DAM, AMX, ADX, SPDIF, AFC) out * connected to AHUB (AUDIO, APBIF, I2S, DAM, AMX, ADX, SPDIF, AFC) out
* of reset and clock-enabled, otherwise reading AHUB devices (in our * of reset and clock-enabled, otherwise reading AHUB devices (in our
* case, I2S/APBIF/AUDIO<XBAR>) will hang. * case, I2S/APBIF/AUDIO<XBAR>) will hang.
*/ */
clock_enable_audio(); clock_enable_audio();
} }