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intel/apollolake: Clear TSEG reg early in bootblock 

TSEG register comes out of reset with a non-zero default value. This
causes issues when cbmem_top returns non-zero value based on TSEG read
before DRAM is initialized. Thus, clear TSEG reg early in bootblock to
avoid unwanted side-effects.

Change-Id: Id3c6c270774108e4caf56e2a07c5072edc65bb58
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15049
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
This commit is contained in:
Furquan Shaikh 2016-06-01 15:09:21 -07:00 committed by Martin Roth
parent b54a2d1d76
commit e3a692d7da
1 changed files with 6 additions and 0 deletions
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6
src/soc/intel/apollolake/bootblock/bootblock.c
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@ -60,6 +60,12 @@ void asmlinkage bootblock_c_entry(uint32_t tsc_hi, uint32_t tsc_lo)
/* Set PCI Express BAR */ /* Set PCI Express BAR */
pci_io_write_config32(dev, PCIEXBAR, CONFIG_MMCONF_BASE_ADDRESS | 1); pci_io_write_config32(dev, PCIEXBAR, CONFIG_MMCONF_BASE_ADDRESS | 1);
/*
* Clear TSEG register - TSEG register comes out of reset with a
* non-zero default value. Clear this register to ensure that there are
* no surprises in CBMEM handling.
*/
pci_write_config32(dev, TSEG, 0);
dev = P2SB_DEV; dev = P2SB_DEV;
/* BAR and MMIO enable for IOSF, so that GPIOs can be configured */ /* BAR and MMIO enable for IOSF, so that GPIOs can be configured */