AGESA fam15tn: Use common GetHeapBase()
Implementation of this function is common for all boards in family, and also across different families. Change-Id: I562a132fa6d3ade2700d9a375d7aa21fcf8ea890 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5653 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -41,8 +41,6 @@
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#include "FchPlatform.h"
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#include "Fch.h"
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#include <cpu/amd/agesa/s3_resume.h>
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#include <cbmem.h>
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <device/device.h>
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#include "hudson.h"
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@ -248,23 +246,6 @@ agesawrapper_amdinitearly (
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return (UINT32)status;
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}
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UINT32 GetHeapBase(
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AMD_CONFIG_PARAMS *StdHeader
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)
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{
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UINT32 heap;
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#if CONFIG_HAVE_ACPI_RESUME
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/* Both romstage and ramstage has this S3 detect. */
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if (acpi_get_sleep_type() == 3)
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heap = (UINT32)cbmem_find(CBMEM_ID_RESUME_SCRATCH) + (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE); /* base + high_stack_size */
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else
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#endif
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heap = BIOS_HEAP_START_ADDRESS; /* Low mem */
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return heap;
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}
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UINT32
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agesawrapper_amdinitpost (
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VOID
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@ -92,6 +92,4 @@ UINT32 agesawrapper_amds3laterestore (VOID);
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UINT32 agesawrapper_fchs3earlyrestore (VOID);
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UINT32 agesawrapper_fchs3laterestore (VOID);
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UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader);
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#endif
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@ -41,8 +41,6 @@
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#include "FchPlatform.h"
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#include "Fch.h"
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#include <cpu/amd/agesa/s3_resume.h>
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#include <cbmem.h>
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <device/device.h>
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#include "hudson.h"
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@ -246,23 +244,6 @@ agesawrapper_amdinitearly (
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return (UINT32)status;
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}
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UINT32 GetHeapBase(
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AMD_CONFIG_PARAMS *StdHeader
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)
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{
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UINT32 heap;
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#if CONFIG_HAVE_ACPI_RESUME
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/* Both romstage and ramstage has this S3 detect. */
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if (acpi_get_sleep_type() == 3)
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heap = (UINT32)cbmem_find(CBMEM_ID_RESUME_SCRATCH) + (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE); /* base + high_stack_size */
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else
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#endif
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heap = BIOS_HEAP_START_ADDRESS; /* Low mem */
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return heap;
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}
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UINT32
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agesawrapper_amdinitpost (
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VOID
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@ -92,6 +92,4 @@ UINT32 agesawrapper_amds3laterestore (VOID);
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UINT32 agesawrapper_fchs3earlyrestore (VOID);
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UINT32 agesawrapper_fchs3laterestore (VOID);
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UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader);
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#endif
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@ -26,9 +26,7 @@
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#include "BiosCallOuts.h"
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#include "PlatformGnbPcieComplex.h"
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <cbmem.h>
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#include <cpu/amd/agesa/s3_resume.h>
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#include <cpu/x86/mtrr.h>
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#include <device/device.h>
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@ -239,23 +237,6 @@ agesawrapper_amdinitearly (
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return (UINT32)status;
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}
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UINT32 GetHeapBase(
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AMD_CONFIG_PARAMS *StdHeader
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)
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{
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UINT32 heap;
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#if CONFIG_HAVE_ACPI_RESUME
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/* Both romstage and ramstage has this S3 detect. */
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if (acpi_get_sleep_type() == 3)
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heap = (UINT32)cbmem_find(CBMEM_ID_RESUME_SCRATCH) + (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE); /* base + high_stack_size */
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else
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#endif
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heap = BIOS_HEAP_START_ADDRESS; /* Low mem */
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return heap;
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}
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UINT32
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agesawrapper_amdinitpost (
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VOID
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@ -91,6 +91,4 @@ UINT32 agesawrapper_amds3laterestore (VOID);
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UINT32 agesawrapper_fchs3earlyrestore (VOID);
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UINT32 agesawrapper_fchs3laterestore (VOID);
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UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader);
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#endif
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@ -28,9 +28,7 @@
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#define __SIMPLE_DEVICE__
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <cbmem.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/mtrr.h>
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#include <device/device.h>
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@ -230,23 +228,6 @@ agesawrapper_amdinitearly (
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return (UINT32)status;
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}
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UINT32 GetHeapBase(
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AMD_CONFIG_PARAMS *StdHeader
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)
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{
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UINT32 heap;
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#if CONFIG_HAVE_ACPI_RESUME
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/* Both romstage and ramstage has this S3 detect. */
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if (acpi_get_sleep_type() == 3)
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heap = (UINT32)cbmem_find(CBMEM_ID_RESUME_SCRATCH) + (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE); /* base + high_stack_size */
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else
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#endif
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heap = BIOS_HEAP_START_ADDRESS; /* Low mem */
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return heap;
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}
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UINT32
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agesawrapper_amdinitpost (
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VOID
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@ -91,6 +91,4 @@ UINT32 agesawrapper_amds3laterestore (VOID);
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UINT32 agesawrapper_fchs3earlyrestore (VOID);
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UINT32 agesawrapper_fchs3laterestore (VOID);
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UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader);
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#endif
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@ -27,6 +27,7 @@
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#include "dimmSpd.h"
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#include "fam15tn_callouts.h"
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#include <cbmem.h>
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#include <arch/acpi.h>
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#define AGESA_RUNTIME_SIZE 4096
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@ -50,6 +51,21 @@ static AGESA_STATUS alloc_cbmem(AGESA_BUFFER_PARAMS *AllocParams) {
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return AGESA_SUCCESS;
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}
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UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader)
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{
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UINT32 heap = BIOS_HEAP_START_ADDRESS;
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#if CONFIG_HAVE_ACPI_RESUME
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/* Both romstage and ramstage has this S3 detect. */
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if (acpi_get_sleep_type() == 3)
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heap = (UINT32) cbmem_find(CBMEM_ID_RESUME_SCRATCH) +
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(CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE);
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/* himem_heap_base + high_stack_size */
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#endif
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return heap;
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}
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AGESA_STATUS fam15tn_AllocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
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{
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UINT32 AvailableHeapSize;
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@ -39,6 +39,8 @@ typedef struct _BIOS_BUFFER_NODE {
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UINT32 NextNodeOffset;
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} BIOS_BUFFER_NODE;
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UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader);
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AGESA_STATUS fam15tn_AllocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
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AGESA_STATUS fam15tn_DeallocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
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AGESA_STATUS fam15tn_LocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
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