GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/tigerlake: Update Pkg C-State latencies 

Update to recommended C-state entry/exit latencies as per
BWG(611569) Rev 0.8: section 4.5.3.2.2

BUG=none
TEST=Boot to OS and check C-State latencies
"cat /sys/devices/system/cpu/cpu0/cpuidle/state*/{name,latency}"

Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Change-Id: Ic1258ecbb355b94889b30d01bceca586525bbe5e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43316
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Shreesh Chhabbi <shreesh.chhabbi@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ravi Sarawadi 2020-07-08 23:11:01 -07:00 committed by Furquan Shaikh
parent 7cd8c79177
commit e4109ff54f
1 changed files with 5 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/soc/intel/tigerlake/include/soc/cpu.h
View File

@ -7,11 +7,11 @@
/* Latency times in us */
#define C1_LATENCY 1
#define C6_LATENCY 127
#define C7_LATENCY 253
#define C8_LATENCY 260
#define C9_LATENCY 487
#define C10_LATENCY 1048
#define C6_LATENCY 121
#define C7_LATENCY 152
#define C8_LATENCY 256
#define C9_LATENCY 340
#define C10_LATENCY 1034
/* Power in units of mW */
#define C1_POWER 0x3e8