soc/qualcomm/ipq*: Move spi driver to use spi_bus_map
This is in preparation to get rid of the strong spi_setup_slave implemented by different platforms. BUG=b:38430839 Change-Id: I6cc8c339e008e16449fa143c1d21e23534bdaf0b Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19776 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -647,18 +647,12 @@ out:
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return ret;
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}
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static const struct spi_ctrlr spi_ctrlr = {
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.claim_bus = spi_ctrlr_claim_bus,
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.release_bus = spi_ctrlr_release_bus,
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.xfer = spi_ctrlr_xfer,
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.xfer_vector = spi_xfer_two_vectors,
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.max_xfer_size = MAX_PACKET_COUNT,
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};
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int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
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static int spi_ctrlr_setup(const struct spi_slave *slave)
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{
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struct ipq_spi_slave *ds = NULL;
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int i;
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unsigned int bus = slave->bus;
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unsigned int cs = slave->cs;
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if ((bus < BLSP0_SPI) || (bus > BLSP1_SPI)
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|| ((bus == BLSP0_SPI) && (cs > 2))
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@ -674,9 +668,8 @@ int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
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continue;
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ds = spi_slave_pool + i;
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ds->slave.bus = slave->bus = bus;
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ds->slave.cs = slave->cs = cs;
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slave->ctrlr = &spi_ctrlr;
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ds->slave.bus = bus;
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ds->slave.cs = cs;
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ds->regs = &spi_reg[bus];
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/*
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@ -694,3 +687,22 @@ int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
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printk(BIOS_ERR, "SPI error: all %d pools busy\n", i);
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return -1;
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}
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static const struct spi_ctrlr spi_ctrlr = {
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.setup = spi_ctrlr_setup,
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.claim_bus = spi_ctrlr_claim_bus,
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.release_bus = spi_ctrlr_release_bus,
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.xfer = spi_ctrlr_xfer,
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.xfer_vector = spi_xfer_two_vectors,
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.max_xfer_size = MAX_PACKET_COUNT,
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};
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const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
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{
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.ctrlr = &spi_ctrlr,
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.bus_start = BLSP0_SPI,
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.bus_end = BLSP1_SPI,
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},
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};
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const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);
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@ -752,17 +752,12 @@ out:
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return ret;
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}
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static const struct spi_ctrlr spi_ctrlr = {
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.claim_bus = spi_ctrlr_claim_bus,
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.release_bus = spi_ctrlr_release_bus,
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.xfer = spi_ctrlr_xfer,
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.max_xfer_size = MAX_PACKET_COUNT,
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};
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int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
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static int spi_ctrlr_setup(const struct spi_slave *slave)
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{
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struct ipq_spi_slave *ds = NULL;
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int i;
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unsigned int bus = slave->bus;
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unsigned int cs = slave->cs;
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/*
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* IPQ GSBI (Generic Serial Bus Interface) supports SPI Flash
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@ -782,9 +777,8 @@ int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
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continue;
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ds = spi_slave_pool + i;
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ds->slave.bus = slave->bus = bus;
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ds->slave.cs = slave->cs = cs;
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slave->ctrlr = &spi_ctrlr;
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ds->slave.bus = bus;
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ds->slave.cs = cs;
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ds->regs = &spi_reg[bus];
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/*
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@ -802,3 +796,21 @@ int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
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printk(BIOS_ERR, "SPI error: all %d pools busy\n", i);
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return -1;
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}
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static const struct spi_ctrlr spi_ctrlr = {
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.setup = spi_ctrlr_setup,
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.claim_bus = spi_ctrlr_claim_bus,
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.release_bus = spi_ctrlr_release_bus,
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.xfer = spi_ctrlr_xfer,
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.max_xfer_size = MAX_PACKET_COUNT,
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};
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const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
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{
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.ctrlr = &spi_ctrlr,
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.bus_start = GSBI5_SPI,
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.bus_end = GSBI7_SPI,
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},
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};
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const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);
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