IEI-Kino Fam10 MPtable fix.
Make changes to MPtable to match the ACPI tables. Change-Id: Icc18c9a25695d01d88d6ee5367064d527cc42bc1 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: http://review.coreboot.org/629 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -107,8 +107,30 @@ static void *smp_write_config_table(void *v)
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#define PCI_INT(bus, dev, fn, pin)
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#endif
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/* changes added to match acpi tables */
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PCI_INT(0x0, 0x02, 0x0, 0x12);
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PCI_INT(0x0, 0x03, 0x0, 0x13);
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PCI_INT(0x0, 0x04, 0x0, 0x10);
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PCI_INT(0x0, 0x09, 0x0, 0x11);
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PCI_INT(0x0, 0x0A, 0x0, 0x12);
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PCI_INT(0x0, 0x12, 0x2, 0x12);
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PCI_INT(0x0, 0x12, 0x3, 0x13);
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PCI_INT(0x0, 0x13, 0x2, 0x10);
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PCI_INT(0x0, 0x13, 0x2, 0x11);
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PCI_INT(0x0, 0x14, 0x1, 0x11);
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PCI_INT(0x0, 0x14, 0x3, 0x13);
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PCI_INT(0x1, 0x05, 0x2, 0x10);
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PCI_INT(0x1, 0x05, 0x3, 0x11);
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PCI_INT(0x2, 0x00, 0x0, 0x12);
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PCI_INT(0x2, 0x00, 0x1, 0x13);
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PCI_INT(0x2, 0x00, 0x2, 0x10);
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PCI_INT(0x2, 0x00, 0x3, 0x11);
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/* RS780 PCI to PCI bridge (PCIE port 4) */
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PCI_INT(0x0, 0x09, 0x0, 0x11);
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/* usb */
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PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */
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PCI_INT(0x0, 0x12, 0x0, 0x10); /* USB */
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PCI_INT(0x0, 0x12, 0x1, 0x11);
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PCI_INT(0x0, 0x13, 0x0, 0x12);
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PCI_INT(0x0, 0x13, 0x1, 0x13);
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@ -118,22 +140,25 @@ static void *smp_write_config_table(void *v)
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PCI_INT(0x0, 0x11, 0x0, 0x16);
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/* HD Audio: b0:d20:f1:reg63 should be 0. */
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/* PCI_INT(0x0, 0x14, 0x2, 0x12); */
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PCI_INT(0x0, 0x14, 0x2, 0x12);
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/* on board NIC & Slot PCIE. */
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/* PCI_INT(bus_rs780[0x1], 0x5, 0x0, 0x12); */
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/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */
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PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); /* Dev 2, external GFX */
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/* PCI_INT(bus_rs780[0x1], 0x5, 0x1, 0x13); */
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PCI_INT(0x1, 0x5, 0x0, 0x12); /* VGA */
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PCI_INT(0x1, 0x5, 0x1, 0x13); /* Audio */
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/* PCI_INT(bus_rs780[0x2], 0x0, 0x0, 0x12); */ /* Dev 2, external GFX */
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/* PCI_INT(bus_rs780[0x3], 0x0, 0x0, 0x13); */
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PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10);
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/* PCI_INT(bus_rs780[0x4], 0x0, 0x0, 0x10); */
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/* configuration B doesnt need dev 5,6,7 */
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/*
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* PCI_INT(bus_rs780[0x5], 0x0, 0x0, 0x11);
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* PCI_INT(bus_rs780[0x6], 0x0, 0x0, 0x12);
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* PCI_INT(bus_rs780[0x7], 0x0, 0x0, 0x13);
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*/
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PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11);
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PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); /* NIC */
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/* PCI_INT(bus_rs780[0x9], 0x0, 0x0, 0x11); */
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PCI_INT(0x3, 0x0, 0x0, 0x11); /* NIC */
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/* PCI_INT(bus_rs780[0xA], 0x0, 0x0, 0x12); NIC */
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/* PCI slots */
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/* PCI_SLOT 0. */
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