diff --git a/src/soc/mediatek/mt8183/include/soc/memlayout.ld b/src/soc/mediatek/mt8183/include/soc/memlayout.ld
index a8f464a3d8..996d2ecbc8 100644
--- a/src/soc/mediatek/mt8183/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8183/include/soc/memlayout.ld
@@ -32,11 +32,10 @@ SECTIONS
 	SRAM_START(0x00100000)
 	VBOOT2_WORK(0x00100000, 12K)
 	VBOOT2_TPM_LOG(0x00103000, 2K)
-	PRERAM_CBMEM_CONSOLE(0x00103800, 14K)
-	WATCHDOG_TOMBSTONE(0x00107000, 4)
-	PRERAM_CBFS_CACHE(0x00107004, 46K - 4)
-	FMAP_CACHE(0x00112800, 2K)
-	TIMESTAMP(0x00113000, 4K)
+	FMAP_CACHE(0x00103800, 2K)
+	WATCHDOG_TOMBSTONE(0x00104000, 4)
+	PRERAM_CBMEM_CONSOLE(0x00104004, 63K - 4)
+	TIMESTAMP(0x00113c00, 1K)
 	STACK(0x00114000, 16K)
 	TTB(0x00118000, 28K)
 	DMA_COHERENT(0x0011f000, 4K)
@@ -45,7 +44,8 @@ SECTIONS
 	SRAM_L2C_START(0x00200000)
 	OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x00201000, 188K)
 	BOOTBLOCK(0x00230000, 64K)
-	DRAM_INIT_CODE(0x00240000, 256K)
+	DRAM_INIT_CODE(0x00240000, 208K)
+	PRERAM_CBFS_CACHE(0x00274000, 48K)
 	SRAM_L2C_END(0x00280000)
 
 	DRAM_START(0x40000000)