vc/amd/fsp/*/platform_descriptor: add dxio_link_hotplug_type enum

Add the dxio_link_hotplug_type enum definition for the link_hotplug
field in the DXIO descriptor struct.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ieeb3e3edaed2c689707edc4df7d25c777005fde2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76438
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Felix Held 2023-07-12 20:12:12 +02:00
parent f278eed07c
commit e479b3e356
5 changed files with 55 additions and 5 deletions

View File

@ -68,6 +68,16 @@ enum dxio_aspm_type {
ASPM_MAX // Not valid value, used to verify input
};
/* PCIe link hotplug */
enum dxio_link_hotplug_type {
HOTPLUG_DISABLED = 0,
HOTPLUG_BASIC,
HOTPLUG_SERVER,
HOTPLUG_ENHANCED,
HOTPLUG_INBOARD,
HOTPLUG_SERVER_SSD,
};
enum dxio_port_param_type {
PP_DEVICE = 1,
PP_FUNCTION,
@ -200,7 +210,7 @@ typedef struct __packed {
uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
uint32_t clk_req :4; // See cpm_clk_req
uint8_t link_hotplug; // Currently unused by FSP
uint8_t link_hotplug; // See dxio_link_hotplug_type
uint8_t slot_power_limit; // Currently unused by FSP
uint32_t slot_power_limit_scale :2; // Currently unused by FSP
uint32_t reserved_4 :6;

View File

@ -72,6 +72,16 @@ enum dxio_aspm_type {
ASPM_MAX // Not valid value, used to verify input
};
/* PCIe link hotplug */
enum dxio_link_hotplug_type {
HOTPLUG_DISABLED = 0,
HOTPLUG_BASIC,
HOTPLUG_SERVER,
HOTPLUG_ENHANCED,
HOTPLUG_INBOARD,
HOTPLUG_SERVER_SSD,
};
enum dxio_port_param_type {
PP_DEVICE = 1,
PP_FUNCTION,
@ -195,7 +205,7 @@ typedef struct __packed {
uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
uint32_t clk_req :4; // See cpm_clk_req
uint8_t link_hotplug; // Currently unused by FSP
uint8_t link_hotplug; // See dxio_link_hotplug_type
uint8_t slot_power_limit; // Currently unused by FSP
uint32_t slot_power_limit_scale :2; // Currently unused by FSP
uint32_t reserved_4 :6;

View File

@ -68,6 +68,16 @@ enum dxio_aspm_type {
ASPM_MAX // Not valid value, used to verify input
};
/* PCIe link hotplug */
enum dxio_link_hotplug_type {
HOTPLUG_DISABLED = 0,
HOTPLUG_BASIC,
HOTPLUG_SERVER,
HOTPLUG_ENHANCED,
HOTPLUG_INBOARD,
HOTPLUG_SERVER_SSD,
};
enum dxio_port_param_type {
PP_DEVICE = 1,
PP_FUNCTION,
@ -222,7 +232,7 @@ typedef struct __packed {
uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
uint32_t clk_req :4; // See cpm_clk_req
uint8_t link_hotplug; // Currently unused by FSP
uint8_t link_hotplug; // See dxio_link_hotplug_type
uint8_t slot_power_limit; // Currently unused by FSP
uint32_t slot_power_limit_scale :2; // Currently unused by FSP
uint32_t reserved_4 :6;

View File

@ -72,6 +72,16 @@ enum dxio_aspm_type {
ASPM_MAX // Not valid value, used to verify input
};
/* PCIe link hotplug */
enum dxio_link_hotplug_type {
HOTPLUG_DISABLED = 0,
HOTPLUG_BASIC,
HOTPLUG_SERVER,
HOTPLUG_ENHANCED,
HOTPLUG_INBOARD,
HOTPLUG_SERVER_SSD,
};
enum dxio_port_param_type {
PP_DEVICE = 1,
PP_FUNCTION,
@ -229,7 +239,7 @@ typedef struct __packed {
uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
uint32_t clk_req :4; // See cpm_clk_req
uint8_t link_hotplug; // Hotplug control
uint8_t link_hotplug; // See dxio_link_hotplug_type
uint8_t slot_power_limit; // PCIe slot power limit
uint32_t slot_power_limit_scale :2; // PCIe slot power limit scale
uint32_t :6;

View File

@ -67,6 +67,16 @@ typedef enum {
ASPM_MAX // Not valid value, used to verify input
} dxio_aspm_type;
/* PCIe link hotplug */
enum dxio_link_hotplug_type {
HOTPLUG_DISABLED = 0,
HOTPLUG_BASIC,
HOTPLUG_SERVER,
HOTPLUG_ENHANCED,
HOTPLUG_INBOARD,
HOTPLUG_SERVER_SSD,
};
/* DDI Aux channel */
typedef enum {
AUX1 = 0,
@ -173,7 +183,7 @@ typedef struct __packed {
uint32_t link_aspm_L1_1 :1; // En/Dis root port capabilities for L1.1
uint32_t link_aspm_L1_2 :1; // En/Dis root port capabilities for L1.2
uint32_t clk_req :4; // See cpm_clk_req
uint8_t link_hotplug; // Currently unused by FSP
uint8_t link_hotplug; // See dxio_link_hotplug_type
uint8_t slot_power_limit; // Currently unused by FSP
uint32_t slot_power_limit_scale :2; // Currently unused by FSP
uint32_t reserved_4 :6;