Various cosmetic and coding style fixes in src/devices.
Also: - Improve a few code comments, fix typos, etc. - Change a few more variable types to u8/u16/u32 etc. - Make some very long lines fit into 80chars/line. - Drop a huge duplicated comment, use "@see" to refer to the other one. - Reduce nesting level a bit by restructuring some code chunks. - s/Config.lb/devicetree.cb/ in a few places. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6019 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
305e8861d6
commit
e4870474b9
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@ -26,27 +26,30 @@
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static void agp_tune_dev(device_t dev)
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static void agp_tune_dev(device_t dev)
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{
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{
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unsigned cap;
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unsigned int cap;
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cap = pci_find_capability(dev, PCI_CAP_ID_AGP);
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cap = pci_find_capability(dev, PCI_CAP_ID_AGP);
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if (!cap) {
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if (!cap)
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return;
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return;
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}
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/* The OS is responsible for AGP tuning so do nothing here */
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/* The OS is responsible for AGP tuning so do nothing here. */
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}
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}
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unsigned int agp_scan_bus(struct bus *bus,
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unsigned int agp_scan_bus(struct bus *bus, unsigned int min_devfn,
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unsigned min_devfn, unsigned max_devfn, unsigned int max)
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unsigned int max_devfn, unsigned int max)
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{
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{
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device_t child;
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device_t child;
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max = pci_scan_bus(bus, min_devfn, max_devfn, max);
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max = pci_scan_bus(bus, min_devfn, max_devfn, max);
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for (child = bus->children; child; child = child->sibling) {
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for (child = bus->children; child; child = child->sibling) {
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if ((child->path.pci.devfn < min_devfn) ||
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if ((child->path.pci.devfn < min_devfn) ||
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(child->path.pci.devfn > max_devfn))
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(child->path.pci.devfn > max_devfn)) {
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{
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continue;
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continue;
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}
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}
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agp_tune_dev(child);
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agp_tune_dev(child);
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}
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}
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return max;
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return max;
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}
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}
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@ -55,7 +58,7 @@ unsigned int agp_scan_bridge(device_t dev, unsigned int max)
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return do_pci_scan_bridge(dev, max, agp_scan_bus);
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return do_pci_scan_bridge(dev, max, agp_scan_bus);
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}
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}
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/** Default device operations for AGP bridges */
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/** Default device operations for AGP bridges. */
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static struct pci_operations agp_bus_ops_pci = {
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static struct pci_operations agp_bus_ops_pci = {
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.set_subsystem = 0,
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.set_subsystem = 0,
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};
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};
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@ -42,12 +42,13 @@ static void cardbus_record_bridge_resource(device_t dev, resource_t moving,
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resource_t min_size, unsigned int index, unsigned long type)
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resource_t min_size, unsigned int index, unsigned long type)
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{
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{
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struct resource *resource;
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struct resource *resource;
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unsigned long gran;
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resource_t step;
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/* Initialize the constraints on the current bus. */
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/* Initialize the constraints on the current bus. */
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resource = NULL;
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resource = NULL;
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if (moving) {
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if (!moving)
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unsigned long gran;
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return;
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resource_t step;
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resource = new_resource(dev, index);
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resource = new_resource(dev, index);
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resource->size = 0;
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resource->size = 0;
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@ -62,17 +63,12 @@ static void cardbus_record_bridge_resource(device_t dev, resource_t moving,
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resource->limit = moving | (step - 1);
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resource->limit = moving | (step - 1);
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resource->flags = type;
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resource->flags = type;
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/*
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/* Don't let the minimum size exceed what we can put in the resource. */
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* Don't let the minimum size exceed what we
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* can put in the resource.
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*/
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if ((min_size - 1) > resource->limit)
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if ((min_size - 1) > resource->limit)
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min_size = resource->limit + 1;
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min_size = resource->limit + 1;
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resource->size = min_size;
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resource->size = min_size;
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}
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}
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return;
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}
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static void cardbus_size_bridge_resource(device_t dev, unsigned int index)
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static void cardbus_size_bridge_resource(device_t dev, unsigned int index)
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{
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{
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@ -18,15 +18,18 @@
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/*
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/*
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* (c) 1999--2000 Martin Mares <mj@suse.cz>
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* (c) 1999--2000 Martin Mares <mj@suse.cz>
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*/
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*/
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/* lots of mods by ron minnich (rminnich@lanl.gov), with
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* the final architecture guidance from Tom Merritt (tjm@codegen.com)
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/*
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* Lots of mods by Ron Minnich <rminnich@lanl.gov>, with
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* the final architecture guidance from Tom Merritt <tjm@codegen.com>.
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*
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* In particular, we changed from the one-pass original version to
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* In particular, we changed from the one-pass original version to
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* Tom's recommended multiple-pass version. I wasn't sure about doing
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* Tom's recommended multiple-pass version. I wasn't sure about doing
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* it with multiple passes, until I actually started doing it and saw
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* it with multiple passes, until I actually started doing it and saw
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* the wisdom of Tom's recommendations...
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* the wisdom of Tom's recommendations...
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*
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*
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* Lots of cleanups by Eric Biederman to handle bridges, and to
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* Lots of cleanups by Eric Biederman to handle bridges, and to
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* handle resource allocation for non-pci devices.
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* handle resource allocation for non-PCI devices.
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*/
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*/
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#include <console/console.h>
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#include <console/console.h>
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@ -67,13 +70,12 @@ device_t alloc_dev(struct bus *parent, struct device_path *path)
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spin_lock(&dev_lock);
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spin_lock(&dev_lock);
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/* Find the last child of our parent. */
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/* Find the last child of our parent. */
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for (child = parent->children; child && child->sibling; /* */ ) {
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for (child = parent->children; child && child->sibling; /* */ )
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child = child->sibling;
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child = child->sibling;
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}
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dev = malloc(sizeof(*dev));
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dev = malloc(sizeof(*dev));
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if (dev == 0)
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if (dev == 0)
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die("DEV: out of memory.\n");
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die("alloc_dev(): out of memory.\n");
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memset(dev, 0, sizeof(*dev));
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memset(dev, 0, sizeof(*dev));
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memcpy(&dev->path, path, sizeof(*path));
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memcpy(&dev->path, path, sizeof(*path));
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/* Add the new device to the list of children of the bus. */
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/* Add the new device to the list of children of the bus. */
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dev->bus = parent;
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dev->bus = parent;
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if (child) {
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if (child)
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child->sibling = dev;
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child->sibling = dev;
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} else {
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else
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parent->children = dev;
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parent->children = dev;
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}
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/* Append a new device to the global device list.
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/* Append a new device to the global device list.
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* The list is used to find devices once everything is set up.
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* The list is used to find devices once everything is set up.
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@ -130,9 +131,10 @@ static void read_resources(struct bus *bus)
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/* Walk through all devices and find which resources they need. */
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/* Walk through all devices and find which resources they need. */
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for (curdev = bus->children; curdev; curdev = curdev->sibling) {
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for (curdev = bus->children; curdev; curdev = curdev->sibling) {
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struct bus *link;
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struct bus *link;
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if (!curdev->enabled) {
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if (!curdev->enabled)
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continue;
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continue;
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}
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if (!curdev->ops || !curdev->ops->read_resources) {
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if (!curdev->ops || !curdev->ops->read_resources) {
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printk(BIOS_ERR, "%s missing read_resources\n",
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printk(BIOS_ERR, "%s missing read_resources\n",
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dev_path(curdev));
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dev_path(curdev));
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@ -169,7 +171,7 @@ static void pick_largest_resource(void *gp, struct device *dev,
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return;
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return;
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}
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}
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if (resource->flags & IORESOURCE_FIXED)
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if (resource->flags & IORESOURCE_FIXED)
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return; // Skip it.
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return; /* Skip it. */
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if (last && ((last->align < resource->align) ||
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if (last && ((last->align < resource->align) ||
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((last->align == resource->align) &&
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((last->align == resource->align) &&
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(last->size < resource->size)) ||
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(last->size < resource->size)) ||
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@ -206,7 +208,7 @@ static struct device *largest_resource(struct bus *bus,
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}
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}
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/**
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/**
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* Compute allocate resources is the guts of the resource allocator.
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* This function is the guts of the resource allocator.
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*
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*
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* The problem.
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* The problem.
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* - Allocate resource locations for every device.
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* - Allocate resource locations for every device.
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resource_t base;
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resource_t base;
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base = round(bridge->base, bridge->align);
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base = round(bridge->base, bridge->align);
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printk(BIOS_SPEW, "%s %s_%s: base: %llx size: %llx align: %d gran: %d limit: %llx\n",
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printk(BIOS_SPEW, "%s %s_%s: base: %llx size: %llx align: %d gran: %d"
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dev_path(bus->dev), __func__,
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" limit: %llx\n", dev_path(bus->dev), __func__,
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(type & IORESOURCE_IO) ? "io" : (type & IORESOURCE_PREFETCH) ?
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(type & IORESOURCE_IO) ? "io" : (type & IORESOURCE_PREFETCH) ?
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"prefmem" : "mem",
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"prefmem" : "mem", base, bridge->size, bridge->align,
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base, bridge->size, bridge->align, bridge->gran, bridge->limit);
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bridge->gran, bridge->limit);
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/* For each child which is a bridge, compute_resource_needs. */
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/* For each child which is a bridge, compute the resource needs. */
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for (dev = bus->children; dev; dev = dev->sibling) {
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for (dev = bus->children; dev; dev = dev->sibling) {
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struct resource *child_bridge;
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struct resource *child_bridge;
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@ -264,24 +266,28 @@ static void compute_resources(struct bus *bus, struct resource *bridge,
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child_bridge = child_bridge->next) {
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child_bridge = child_bridge->next) {
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struct bus* link;
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struct bus* link;
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if (!(child_bridge->flags & IORESOURCE_BRIDGE) ||
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if (!(child_bridge->flags & IORESOURCE_BRIDGE)
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(child_bridge->flags & type_mask) != type)
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|| (child_bridge->flags & type_mask) != type)
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continue;
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continue;
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/* Split prefetchable memory if combined. Many domains
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/*
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* Split prefetchable memory if combined. Many domains
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* use the same address space for prefetchable memory
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* use the same address space for prefetchable memory
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* and non-prefetchable memory. Bridges below them
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* and non-prefetchable memory. Bridges below them need
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* need it separated. Add the PREFETCH flag to the
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* it separated. Add the PREFETCH flag to the type_mask
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* type_mask and type.
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* and type.
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*/
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*/
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link = dev->link_list;
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link = dev->link_list;
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while (link && link->link_num !=
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while (link && link->link_num !=
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IOINDEX_LINK(child_bridge->index))
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IOINDEX_LINK(child_bridge->index))
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link = link->next;
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link = link->next;
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if (link == NULL)
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if (link == NULL) {
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printk(BIOS_ERR, "link %ld not found on %s\n",
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printk(BIOS_ERR, "link %ld not found on %s\n",
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IOINDEX_LINK(child_bridge->index),
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IOINDEX_LINK(child_bridge->index),
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dev_path(dev));
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dev_path(dev));
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}
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compute_resources(link, child_bridge,
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compute_resources(link, child_bridge,
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type_mask | IORESOURCE_PREFETCH,
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type_mask | IORESOURCE_PREFETCH,
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type | (child_bridge->flags &
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type | (child_bridge->flags &
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@ -292,37 +298,37 @@ static void compute_resources(struct bus *bus, struct resource *bridge,
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/* Remember we haven't found anything yet. */
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/* Remember we haven't found anything yet. */
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resource = NULL;
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resource = NULL;
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/* Walk through all the resources on the current bus and compute the
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/*
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* Walk through all the resources on the current bus and compute the
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* amount of address space taken by them. Take granularity and
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* amount of address space taken by them. Take granularity and
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* alignment into account.
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* alignment into account.
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*/
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*/
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while ((dev = largest_resource(bus, &resource, type_mask, type))) {
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while ((dev = largest_resource(bus, &resource, type_mask, type))) {
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/* Size 0 resources can be skipped. */
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/* Size 0 resources can be skipped. */
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if (!resource->size) {
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if (!resource->size)
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continue;
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continue;
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}
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/* Propagate the resource alignment to the bridge resource. */
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/* Propagate the resource alignment to the bridge resource. */
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if (resource->align > bridge->align) {
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if (resource->align > bridge->align)
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bridge->align = resource->align;
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bridge->align = resource->align;
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}
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/* Propagate the resource limit to the bridge register. */
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/* Propagate the resource limit to the bridge register. */
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if (bridge->limit > resource->limit) {
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if (bridge->limit > resource->limit)
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bridge->limit = resource->limit;
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bridge->limit = resource->limit;
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}
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/* Warn if it looks like APICs aren't declared. */
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/* Warn if it looks like APICs aren't declared. */
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if ((resource->limit == 0xffffffff) &&
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if ((resource->limit == 0xffffffff) &&
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(resource->flags & IORESOURCE_ASSIGNED)) {
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(resource->flags & IORESOURCE_ASSIGNED)) {
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printk(BIOS_ERR, "Resource limit looks wrong! (no APIC?)\n");
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printk(BIOS_ERR,
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printk(BIOS_ERR, "%s %02lx limit %08Lx\n", dev_path(dev),
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"Resource limit looks wrong! (no APIC?)\n");
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resource->index, resource->limit);
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printk(BIOS_ERR, "%s %02lx limit %08Lx\n",
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dev_path(dev), resource->index, resource->limit);
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}
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}
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if (resource->flags & IORESOURCE_IO) {
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if (resource->flags & IORESOURCE_IO) {
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/* Don't allow potential aliases over the legacy PCI
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/*
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* Don't allow potential aliases over the legacy PCI
|
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* expansion card addresses. The legacy PCI decodes
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* expansion card addresses. The legacy PCI decodes
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* only 10 bits, uses 0x100 - 0x3ff. Therefore, only
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* only 10 bits, uses 0x100 - 0x3ff. Therefore, only
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* 0x00 - 0xff can be used out of each 0x400 block of
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* 0x00 - 0xff can be used out of each 0x400 block of
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@ -331,7 +337,8 @@ static void compute_resources(struct bus *bus, struct resource *bridge,
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if ((base & 0x300) != 0) {
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if ((base & 0x300) != 0) {
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base = (base & ~0x3ff) + 0x400;
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base = (base & ~0x3ff) + 0x400;
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}
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}
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/* Don't allow allocations in the VGA I/O range.
|
/*
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* Don't allow allocations in the VGA I/O range.
|
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* PCI has special cases for that.
|
* PCI has special cases for that.
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*/
|
*/
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else if ((base >= 0x3b0) && (base <= 0x3df)) {
|
else if ((base >= 0x3b0) && (base <= 0x3df)) {
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|
@ -344,24 +351,24 @@ static void compute_resources(struct bus *bus, struct resource *bridge,
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base += resource->size;
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base += resource->size;
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|
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printk(BIOS_SPEW, "%s %02lx * [0x%llx - 0x%llx] %s\n",
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printk(BIOS_SPEW, "%s %02lx * [0x%llx - 0x%llx] %s\n",
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dev_path(dev), resource->index,
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dev_path(dev), resource->index, resource->base,
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resource->base,
|
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resource->base + resource->size - 1,
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resource->base + resource->size - 1,
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(resource->flags & IORESOURCE_IO) ? "io" :
|
(resource->flags & IORESOURCE_IO) ? "io" :
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(resource->flags & IORESOURCE_PREFETCH) ?
|
(resource->flags & IORESOURCE_PREFETCH) ?
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"prefmem" : "mem");
|
"prefmem" : "mem");
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}
|
}
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/* A pci bridge resource does not need to be a power
|
|
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* of two size, but it does have a minimum granularity.
|
/*
|
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* Round the size up to that minimum granularity so we
|
* A PCI bridge resource does not need to be a power of two size, but
|
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* know not to place something else at an address postitively
|
* it does have a minimum granularity. Round the size up to that
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* decoded by the bridge.
|
* minimum granularity so we know not to place something else at an
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|
* address postitively decoded by the bridge.
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||||||
*/
|
*/
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bridge->size = round(base, bridge->gran) -
|
bridge->size = round(base, bridge->gran) -
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round(bridge->base, bridge->align);
|
round(bridge->base, bridge->align);
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|
|
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printk(BIOS_SPEW, "%s %s_%s: base: %llx size: %llx align: %d gran: %d limit: %llx done\n",
|
printk(BIOS_SPEW, "%s %s_%s: base: %llx size: %llx align: %d gran: %d"
|
||||||
dev_path(bus->dev), __func__,
|
" limit: %llx done\n", dev_path(bus->dev), __func__,
|
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(bridge->flags & IORESOURCE_IO) ? "io" :
|
(bridge->flags & IORESOURCE_IO) ? "io" :
|
||||||
(bridge->flags & IORESOURCE_PREFETCH) ? "prefmem" : "mem",
|
(bridge->flags & IORESOURCE_PREFETCH) ? "prefmem" : "mem",
|
||||||
base, bridge->size, bridge->align, bridge->gran, bridge->limit);
|
base, bridge->size, bridge->align, bridge->gran, bridge->limit);
|
||||||
|
@ -370,36 +377,16 @@ static void compute_resources(struct bus *bus, struct resource *bridge,
|
||||||
/**
|
/**
|
||||||
* This function is the second part of the resource allocator.
|
* This function is the second part of the resource allocator.
|
||||||
*
|
*
|
||||||
* The problem.
|
* See the compute_resources function for a more detailed explanation.
|
||||||
* - Allocate resource locations for every device.
|
|
||||||
* - Don't overlap, and follow the rules of bridges.
|
|
||||||
* - Don't overlap with resources in fixed locations.
|
|
||||||
* - Be efficient so we don't have ugly strategies.
|
|
||||||
*
|
*
|
||||||
* The strategy.
|
* This function assigns the resources a value.
|
||||||
* - Devices that have fixed addresses are the minority so don't
|
|
||||||
* worry about them too much. Instead only use part of the address
|
|
||||||
* space for devices with programmable addresses. This easily handles
|
|
||||||
* everything except bridges.
|
|
||||||
*
|
|
||||||
* - PCI devices are required to have their sizes and their alignments
|
|
||||||
* equal. In this case an optimal solution to the packing problem
|
|
||||||
* exists. Allocate all devices from highest alignment to least
|
|
||||||
* alignment or vice versa. Use this.
|
|
||||||
*
|
|
||||||
* - So we can handle more than PCI run two allocation passes on bridges. The
|
|
||||||
* first to see how large the resources are behind the bridge, and what
|
|
||||||
* their alignment requirements are. The second to assign a safe address to
|
|
||||||
* the devices behind the bridge. This allows us to treat a bridge as just
|
|
||||||
* a device with a couple of resources, and not need to special case it in
|
|
||||||
* the allocator. Also this allows handling of other types of bridges.
|
|
||||||
*
|
|
||||||
* - This function assigns the resources a value.
|
|
||||||
*
|
*
|
||||||
* @param bus The bus we are traversing.
|
* @param bus The bus we are traversing.
|
||||||
* @param bridge The bridge resource which must contain the bus' resources.
|
* @param bridge The bridge resource which must contain the bus' resources.
|
||||||
* @param type_mask This value gets ANDed with the resource type.
|
* @param type_mask This value gets ANDed with the resource type.
|
||||||
* @param type This value must match the result of the AND.
|
* @param type This value must match the result of the AND.
|
||||||
|
*
|
||||||
|
* @see compute_resources
|
||||||
*/
|
*/
|
||||||
static void allocate_resources(struct bus *bus, struct resource *bridge,
|
static void allocate_resources(struct bus *bus, struct resource *bridge,
|
||||||
unsigned long type_mask, unsigned long type)
|
unsigned long type_mask, unsigned long type)
|
||||||
|
@ -409,8 +396,8 @@ static void allocate_resources(struct bus *bus, struct resource *bridge,
|
||||||
resource_t base;
|
resource_t base;
|
||||||
base = bridge->base;
|
base = bridge->base;
|
||||||
|
|
||||||
printk(BIOS_SPEW, "%s %s_%s: base:%llx size:%llx align:%d gran:%d limit:%llx\n",
|
printk(BIOS_SPEW, "%s %s_%s: base:%llx size:%llx align:%d gran:%d "
|
||||||
dev_path(bus->dev), __func__,
|
"limit:%llx\n", dev_path(bus->dev), __func__,
|
||||||
(type & IORESOURCE_IO) ? "io" : (type & IORESOURCE_PREFETCH) ?
|
(type & IORESOURCE_IO) ? "io" : (type & IORESOURCE_PREFETCH) ?
|
||||||
"prefmem" : "mem",
|
"prefmem" : "mem",
|
||||||
base, bridge->size, bridge->align, bridge->gran, bridge->limit);
|
base, bridge->size, bridge->align, bridge->gran, bridge->limit);
|
||||||
|
@ -418,15 +405,15 @@ static void allocate_resources(struct bus *bus, struct resource *bridge,
|
||||||
/* Remember we haven't found anything yet. */
|
/* Remember we haven't found anything yet. */
|
||||||
resource = NULL;
|
resource = NULL;
|
||||||
|
|
||||||
/* Walk through all the resources on the current bus and allocate them
|
/*
|
||||||
|
* Walk through all the resources on the current bus and allocate them
|
||||||
* address space.
|
* address space.
|
||||||
*/
|
*/
|
||||||
while ((dev = largest_resource(bus, &resource, type_mask, type))) {
|
while ((dev = largest_resource(bus, &resource, type_mask, type))) {
|
||||||
|
|
||||||
/* Propagate the bridge limit to the resource register. */
|
/* Propagate the bridge limit to the resource register. */
|
||||||
if (resource->limit > bridge->limit) {
|
if (resource->limit > bridge->limit)
|
||||||
resource->limit = bridge->limit;
|
resource->limit = bridge->limit;
|
||||||
}
|
|
||||||
|
|
||||||
/* Size 0 resources can be skipped. */
|
/* Size 0 resources can be skipped. */
|
||||||
if (!resource->size) {
|
if (!resource->size) {
|
||||||
|
@ -437,7 +424,8 @@ static void allocate_resources(struct bus *bus, struct resource *bridge,
|
||||||
}
|
}
|
||||||
|
|
||||||
if (resource->flags & IORESOURCE_IO) {
|
if (resource->flags & IORESOURCE_IO) {
|
||||||
/* Don't allow potential aliases over the legacy PCI
|
/*
|
||||||
|
* Don't allow potential aliases over the legacy PCI
|
||||||
* expansion card addresses. The legacy PCI decodes
|
* expansion card addresses. The legacy PCI decodes
|
||||||
* only 10 bits, uses 0x100 - 0x3ff. Therefore, only
|
* only 10 bits, uses 0x100 - 0x3ff. Therefore, only
|
||||||
* 0x00 - 0xff can be used out of each 0x400 block of
|
* 0x00 - 0xff can be used out of each 0x400 block of
|
||||||
|
@ -446,7 +434,8 @@ static void allocate_resources(struct bus *bus, struct resource *bridge,
|
||||||
if ((base & 0x300) != 0) {
|
if ((base & 0x300) != 0) {
|
||||||
base = (base & ~0x3ff) + 0x400;
|
base = (base & ~0x3ff) + 0x400;
|
||||||
}
|
}
|
||||||
/* Don't allow allocations in the VGA I/O range.
|
/*
|
||||||
|
* Don't allow allocations in the VGA I/O range.
|
||||||
* PCI has special cases for that.
|
* PCI has special cases for that.
|
||||||
*/
|
*/
|
||||||
else if ((base >= 0x3b0) && (base <= 0x3df)) {
|
else if ((base >= 0x3b0) && (base <= 0x3df)) {
|
||||||
|
@ -464,36 +453,33 @@ static void allocate_resources(struct bus *bus, struct resource *bridge,
|
||||||
base += resource->size;
|
base += resource->size;
|
||||||
} else {
|
} else {
|
||||||
printk(BIOS_ERR, "!! Resource didn't fit !!\n");
|
printk(BIOS_ERR, "!! Resource didn't fit !!\n");
|
||||||
printk(BIOS_ERR, " aligned base %llx size %llx limit %llx\n",
|
printk(BIOS_ERR, " aligned base %llx size %llx "
|
||||||
round(base, resource->align), resource->size,
|
"limit %llx\n", round(base, resource->align),
|
||||||
resource->limit);
|
resource->size, resource->limit);
|
||||||
printk(BIOS_ERR, " %llx needs to be <= %llx (limit)\n",
|
printk(BIOS_ERR, " %llx needs to be <= %llx "
|
||||||
(round(base, resource->align) +
|
"(limit)\n", (round(base, resource->align) +
|
||||||
resource->size) - 1, resource->limit);
|
resource->size) - 1, resource->limit);
|
||||||
printk(BIOS_ERR, " %s%s %02lx * [0x%llx - 0x%llx] %s\n",
|
printk(BIOS_ERR, " %s%s %02lx * [0x%llx - 0x%llx]"
|
||||||
(resource->
|
" %s\n", (resource->flags & IORESOURCE_ASSIGNED)
|
||||||
flags & IORESOURCE_ASSIGNED) ? "Assigned: " :
|
? "Assigned: " : "", dev_path(dev),
|
||||||
"", dev_path(dev), resource->index,
|
resource->index, resource->base,
|
||||||
resource->base,
|
|
||||||
resource->base + resource->size - 1,
|
resource->base + resource->size - 1,
|
||||||
(resource->
|
(resource->flags & IORESOURCE_IO) ? "io"
|
||||||
flags & IORESOURCE_IO) ? "io" : (resource->
|
: (resource->flags & IORESOURCE_PREFETCH)
|
||||||
flags &
|
|
||||||
IORESOURCE_PREFETCH)
|
|
||||||
? "prefmem" : "mem");
|
? "prefmem" : "mem");
|
||||||
}
|
}
|
||||||
|
|
||||||
printk(BIOS_SPEW, "%s%s %02lx * [0x%llx - 0x%llx] %s\n",
|
printk(BIOS_SPEW, "%s%s %02lx * [0x%llx - 0x%llx] %s\n",
|
||||||
(resource->flags & IORESOURCE_ASSIGNED) ? "Assigned: "
|
(resource->flags & IORESOURCE_ASSIGNED) ? "Assigned: "
|
||||||
: "",
|
: "", dev_path(dev), resource->index, resource->base,
|
||||||
dev_path(dev), resource->index, resource->base,
|
|
||||||
resource->size ? resource->base + resource->size - 1 :
|
resource->size ? resource->base + resource->size - 1 :
|
||||||
resource->base,
|
resource->base, (resource->flags & IORESOURCE_IO)
|
||||||
(resource->flags & IORESOURCE_IO) ? "io" :
|
? "io" : (resource->flags & IORESOURCE_PREFETCH)
|
||||||
(resource->flags & IORESOURCE_PREFETCH) ? "prefmem" :
|
? "prefmem" : "mem");
|
||||||
"mem");
|
|
||||||
}
|
}
|
||||||
/* A PCI bridge resource does not need to be a power of two size, but
|
|
||||||
|
/*
|
||||||
|
* A PCI bridge resource does not need to be a power of two size, but
|
||||||
* it does have a minimum granularity. Round the size up to that
|
* it does have a minimum granularity. Round the size up to that
|
||||||
* minimum granularity so we know not to place something else at an
|
* minimum granularity so we know not to place something else at an
|
||||||
* address positively decoded by the bridge.
|
* address positively decoded by the bridge.
|
||||||
|
@ -501,11 +487,11 @@ static void allocate_resources(struct bus *bus, struct resource *bridge,
|
||||||
|
|
||||||
bridge->flags |= IORESOURCE_ASSIGNED;
|
bridge->flags |= IORESOURCE_ASSIGNED;
|
||||||
|
|
||||||
printk(BIOS_SPEW, "%s %s_%s: next_base: %llx size: %llx align: %d gran: %d done\n",
|
printk(BIOS_SPEW, "%s %s_%s: next_base: %llx size: %llx align: %d "
|
||||||
dev_path(bus->dev), __func__,
|
"gran: %d done\n", dev_path(bus->dev), __func__,
|
||||||
(type & IORESOURCE_IO) ? "io" : (type & IORESOURCE_PREFETCH) ?
|
(type & IORESOURCE_IO) ? "io" : (type & IORESOURCE_PREFETCH) ?
|
||||||
"prefmem" : "mem",
|
"prefmem" : "mem", base, bridge->size, bridge->align,
|
||||||
base, bridge->size, bridge->align, bridge->gran);
|
bridge->gran);
|
||||||
|
|
||||||
/* For each child which is a bridge, allocate_resources. */
|
/* For each child which is a bridge, allocate_resources. */
|
||||||
for (dev = bus->children; dev; dev = dev->sibling) {
|
for (dev = bus->children; dev; dev = dev->sibling) {
|
||||||
|
@ -523,11 +509,12 @@ static void allocate_resources(struct bus *bus, struct resource *bridge,
|
||||||
(child_bridge->flags & type_mask) != type)
|
(child_bridge->flags & type_mask) != type)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
/* Split prefetchable memory if combined. Many domains
|
/*
|
||||||
|
* Split prefetchable memory if combined. Many domains
|
||||||
* use the same address space for prefetchable memory
|
* use the same address space for prefetchable memory
|
||||||
* and non-prefetchable memory. Bridges below them
|
* and non-prefetchable memory. Bridges below them need
|
||||||
* need it separated. Add the PREFETCH flag to the
|
* it separated. Add the PREFETCH flag to the type_mask
|
||||||
* type_mask and type.
|
* and type.
|
||||||
*/
|
*/
|
||||||
link = dev->link_list;
|
link = dev->link_list;
|
||||||
while (link && link->link_num !=
|
while (link && link->link_num !=
|
||||||
|
@ -537,6 +524,7 @@ static void allocate_resources(struct bus *bus, struct resource *bridge,
|
||||||
printk(BIOS_ERR, "link %ld not found on %s\n",
|
printk(BIOS_ERR, "link %ld not found on %s\n",
|
||||||
IOINDEX_LINK(child_bridge->index),
|
IOINDEX_LINK(child_bridge->index),
|
||||||
dev_path(dev));
|
dev_path(dev));
|
||||||
|
|
||||||
allocate_resources(link, child_bridge,
|
allocate_resources(link, child_bridge,
|
||||||
type_mask | IORESOURCE_PREFETCH,
|
type_mask | IORESOURCE_PREFETCH,
|
||||||
type | (child_bridge->flags &
|
type | (child_bridge->flags &
|
||||||
|
@ -575,8 +563,8 @@ static void constrain_resources(struct device *dev, struct constraints* limits)
|
||||||
continue;
|
continue;
|
||||||
if (!res->size) {
|
if (!res->size) {
|
||||||
/* It makes no sense to have 0-sized, fixed resources.*/
|
/* It makes no sense to have 0-sized, fixed resources.*/
|
||||||
printk(BIOS_ERR, "skipping %s@%lx fixed resource, size=0!\n",
|
printk(BIOS_ERR, "skipping %s@%lx fixed resource, "
|
||||||
dev_path(dev), res->index);
|
"size=0!\n", dev_path(dev), res->index);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -590,30 +578,35 @@ static void constrain_resources(struct device *dev, struct constraints* limits)
|
||||||
else
|
else
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
/* Is it a fixed resource outside the current known region?
|
/*
|
||||||
If so, we don't have to consider it - it will be handled
|
* Is it a fixed resource outside the current known region?
|
||||||
correctly and doesn't affect current region's limits */
|
* If so, we don't have to consider it - it will be handled
|
||||||
if (((res->base + res->size -1) < lim->base) || (res->base > lim->limit))
|
* correctly and doesn't affect current region's limits.
|
||||||
|
*/
|
||||||
|
if (((res->base + res->size -1) < lim->base)
|
||||||
|
|| (res->base > lim->limit))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
/* Choose to be above or below fixed resources. This
|
/*
|
||||||
* check is signed so that "negative" amounts of space
|
* Choose to be above or below fixed resources. This check is
|
||||||
* are handled correctly.
|
* signed so that "negative" amounts of space are handled
|
||||||
|
* correctly.
|
||||||
*/
|
*/
|
||||||
if ((signed long long)(lim->limit - (res->base + res->size -1)) >
|
if ((signed long long)(lim->limit - (res->base + res->size -1))
|
||||||
(signed long long)(res->base - lim->base))
|
> (signed long long)(res->base - lim->base))
|
||||||
lim->base = res->base + res->size;
|
lim->base = res->base + res->size;
|
||||||
else
|
else
|
||||||
lim->limit = res->base -1;
|
lim->limit = res->base -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Descend into every enabled child and look for fixed resources. */
|
/* Descend into every enabled child and look for fixed resources. */
|
||||||
for (link = dev->link_list; link; link = link->next)
|
for (link = dev->link_list; link; link = link->next) {
|
||||||
for (child = link->children; child;
|
for (child = link->children; child; child = child->sibling) {
|
||||||
child = child->sibling)
|
|
||||||
if (child->enabled)
|
if (child->enabled)
|
||||||
constrain_resources(child, limits);
|
constrain_resources(child, limits);
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static void avoid_fixed_resources(struct device *dev)
|
static void avoid_fixed_resources(struct device *dev)
|
||||||
{
|
{
|
||||||
|
@ -621,8 +614,8 @@ static void avoid_fixed_resources(struct device *dev)
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
|
|
||||||
printk(BIOS_SPEW, "%s: %s\n", __func__, dev_path(dev));
|
printk(BIOS_SPEW, "%s: %s\n", __func__, dev_path(dev));
|
||||||
/* Initialize constraints to maximum size. */
|
|
||||||
|
|
||||||
|
/* Initialize constraints to maximum size. */
|
||||||
limits.pref.base = 0;
|
limits.pref.base = 0;
|
||||||
limits.pref.limit = 0xffffffffffffffffULL;
|
limits.pref.limit = 0xffffffffffffffffULL;
|
||||||
limits.io.base = 0;
|
limits.io.base = 0;
|
||||||
|
@ -685,7 +678,7 @@ device_t vga_pri = 0;
|
||||||
static void set_vga_bridge_bits(void)
|
static void set_vga_bridge_bits(void)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
* FIXME: Modify set_vga_bridge so it is less PCI centric!
|
* FIXME: Modify set_vga_bridge() so it is less PCI centric!
|
||||||
* This function knows too much about PCI stuff, it should be just
|
* This function knows too much about PCI stuff, it should be just
|
||||||
* an iterator/visitor.
|
* an iterator/visitor.
|
||||||
*/
|
*/
|
||||||
|
@ -693,29 +686,31 @@ static void set_vga_bridge_bits(void)
|
||||||
/* FIXME: Handle the VGA palette snooping. */
|
/* FIXME: Handle the VGA palette snooping. */
|
||||||
struct device *dev, *vga, *vga_onboard, *vga_first, *vga_last;
|
struct device *dev, *vga, *vga_onboard, *vga_first, *vga_last;
|
||||||
struct bus *bus;
|
struct bus *bus;
|
||||||
|
|
||||||
bus = 0;
|
bus = 0;
|
||||||
vga = 0;
|
vga = 0;
|
||||||
vga_onboard = 0;
|
vga_onboard = 0;
|
||||||
vga_first = 0;
|
vga_first = 0;
|
||||||
vga_last = 0;
|
vga_last = 0;
|
||||||
|
|
||||||
for (dev = all_devices; dev; dev = dev->next) {
|
for (dev = all_devices; dev; dev = dev->next) {
|
||||||
|
|
||||||
if (!dev->enabled)
|
if (!dev->enabled)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
if (((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) &&
|
if (((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) &&
|
||||||
((dev->class >> 8) != PCI_CLASS_DISPLAY_OTHER)) {
|
((dev->class >> 8) != PCI_CLASS_DISPLAY_OTHER)) {
|
||||||
if (!vga_first) {
|
if (!vga_first) {
|
||||||
if (dev->on_mainboard) {
|
if (dev->on_mainboard)
|
||||||
vga_onboard = dev;
|
vga_onboard = dev;
|
||||||
} else {
|
else
|
||||||
vga_first = dev;
|
vga_first = dev;
|
||||||
}
|
|
||||||
} else {
|
} else {
|
||||||
if (dev->on_mainboard) {
|
if (dev->on_mainboard)
|
||||||
vga_onboard = dev;
|
vga_onboard = dev;
|
||||||
} else {
|
else
|
||||||
vga_last = dev;
|
vga_last = dev;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
/* It isn't safe to enable other VGA cards. */
|
/* It isn't safe to enable other VGA cards. */
|
||||||
dev->command &= ~(PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
|
dev->command &= ~(PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
|
||||||
|
@ -724,26 +719,27 @@ static void set_vga_bridge_bits(void)
|
||||||
|
|
||||||
vga = vga_last;
|
vga = vga_last;
|
||||||
|
|
||||||
if (!vga) {
|
if (!vga)
|
||||||
vga = vga_first;
|
vga = vga_first;
|
||||||
}
|
|
||||||
#if CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST == 1
|
#if CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST == 1
|
||||||
if (vga_onboard) // Will use on board VGA as pri.
|
if (vga_onboard) /* Will use onboard VGA as primary. */
|
||||||
#else
|
#else
|
||||||
if (!vga) // Will use last add on adapter as pri.
|
if (!vga) /* Will use last add-on adapter as primary. */
|
||||||
#endif
|
#endif
|
||||||
{
|
{
|
||||||
vga = vga_onboard;
|
vga = vga_onboard;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (vga) {
|
if (vga) {
|
||||||
/* VGA is first add on card or the only onboard VGA. */
|
/* VGA is first add-on card or the only onboard VGA. */
|
||||||
printk(BIOS_DEBUG, "Setting up VGA for %s\n", dev_path(vga));
|
printk(BIOS_DEBUG, "Setting up VGA for %s\n", dev_path(vga));
|
||||||
/* All legacy VGA cards have MEM & I/O space registers. */
|
/* All legacy VGA cards have MEM & I/O space registers. */
|
||||||
vga->command |= (PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
|
vga->command |= (PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
|
||||||
vga_pri = vga;
|
vga_pri = vga;
|
||||||
bus = vga->bus;
|
bus = vga->bus;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Now walk up the bridges setting the VGA enable. */
|
/* Now walk up the bridges setting the VGA enable. */
|
||||||
while (bus) {
|
while (bus) {
|
||||||
printk(BIOS_DEBUG, "Setting PCI_BRIDGE_CTL_VGA for bridge %s\n",
|
printk(BIOS_DEBUG, "Setting PCI_BRIDGE_CTL_VGA for bridge %s\n",
|
||||||
|
@ -758,7 +754,7 @@ static void set_vga_bridge_bits(void)
|
||||||
/**
|
/**
|
||||||
* Assign the computed resources to the devices on the bus.
|
* Assign the computed resources to the devices on the bus.
|
||||||
*
|
*
|
||||||
* Use the device specific set_resources method to store the computed
|
* Use the device specific set_resources() method to store the computed
|
||||||
* resources to hardware. For bridge devices, the set_resources() method
|
* resources to hardware. For bridge devices, the set_resources() method
|
||||||
* has to recurse into every down stream buses.
|
* has to recurse into every down stream buses.
|
||||||
*
|
*
|
||||||
|
@ -776,9 +772,9 @@ void assign_resources(struct bus *bus)
|
||||||
dev_path(bus->dev), bus->secondary, bus->link_num);
|
dev_path(bus->dev), bus->secondary, bus->link_num);
|
||||||
|
|
||||||
for (curdev = bus->children; curdev; curdev = curdev->sibling) {
|
for (curdev = bus->children; curdev; curdev = curdev->sibling) {
|
||||||
if (!curdev->enabled || !curdev->resource_list) {
|
if (!curdev->enabled || !curdev->resource_list)
|
||||||
continue;
|
continue;
|
||||||
}
|
|
||||||
if (!curdev->ops || !curdev->ops->set_resources) {
|
if (!curdev->ops || !curdev->ops->set_resources) {
|
||||||
printk(BIOS_ERR, "%s missing set_resources\n",
|
printk(BIOS_ERR, "%s missing set_resources\n",
|
||||||
dev_path(curdev));
|
dev_path(curdev));
|
||||||
|
@ -808,17 +804,15 @@ static void enable_resources(struct bus *link)
|
||||||
struct bus *c_link;
|
struct bus *c_link;
|
||||||
|
|
||||||
for (dev = link->children; dev; dev = dev->sibling) {
|
for (dev = link->children; dev; dev = dev->sibling) {
|
||||||
if (dev->enabled && dev->ops && dev->ops->enable_resources) {
|
if (dev->enabled && dev->ops && dev->ops->enable_resources)
|
||||||
dev->ops->enable_resources(dev);
|
dev->ops->enable_resources(dev);
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
for (dev = link->children; dev; dev = dev->sibling) {
|
for (dev = link->children; dev; dev = dev->sibling) {
|
||||||
for (c_link = dev->link_list; c_link; c_link = c_link->next) {
|
for (c_link = dev->link_list; c_link; c_link = c_link->next)
|
||||||
enable_resources(c_link);
|
enable_resources(c_link);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Reset all of the devices on a bus and clear the bus's reset_needed flag.
|
* Reset all of the devices on a bus and clear the bus's reset_needed flag.
|
||||||
|
@ -851,6 +845,7 @@ unsigned int scan_bus(struct device *busdev, unsigned int max)
|
||||||
{
|
{
|
||||||
unsigned int new_max;
|
unsigned int new_max;
|
||||||
int do_scan_bus;
|
int do_scan_bus;
|
||||||
|
|
||||||
if (!busdev || !busdev->enabled || !busdev->ops ||
|
if (!busdev || !busdev->enabled || !busdev->ops ||
|
||||||
!busdev->ops->scan_bus) {
|
!busdev->ops->scan_bus) {
|
||||||
return max;
|
return max;
|
||||||
|
@ -863,33 +858,32 @@ unsigned int scan_bus(struct device *busdev, unsigned int max)
|
||||||
do_scan_bus = 0;
|
do_scan_bus = 0;
|
||||||
for (link = busdev->link_list; link; link = link->next) {
|
for (link = busdev->link_list; link; link = link->next) {
|
||||||
if (link->reset_needed) {
|
if (link->reset_needed) {
|
||||||
if (reset_bus(link)) {
|
if (reset_bus(link))
|
||||||
do_scan_bus = 1;
|
do_scan_bus = 1;
|
||||||
} else {
|
else
|
||||||
busdev->bus->reset_needed = 1;
|
busdev->bus->reset_needed = 1;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
|
||||||
return new_max;
|
return new_max;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Determine the existence of devices and extend the device tree.
|
* Determine the existence of devices and extend the device tree.
|
||||||
*
|
*
|
||||||
* Most of the devices in the system are listed in the mainboard Config.lb
|
* Most of the devices in the system are listed in the mainboard devicetree.cb
|
||||||
* file. The device structures for these devices are generated at compile
|
* file. The device structures for these devices are generated at compile
|
||||||
* time by the config tool and are organized into the device tree. This
|
* time by the config tool and are organized into the device tree. This
|
||||||
* function determines if the devices created at compile time actually exist
|
* function determines if the devices created at compile time actually exist
|
||||||
* in the physical system.
|
* in the physical system.
|
||||||
*
|
*
|
||||||
* For devices in the physical system but not listed in the Config.lb file,
|
* For devices in the physical system but not listed in devicetree.cb,
|
||||||
* the device structures have to be created at run time and attached to the
|
* the device structures have to be created at run time and attached to the
|
||||||
* device tree.
|
* device tree.
|
||||||
*
|
*
|
||||||
* This function starts from the root device 'dev_root', scan the buses in
|
* This function starts from the root device 'dev_root', scans the buses in
|
||||||
* the system recursively, modify the device tree according to the result of
|
* the system recursively, and modifies the device tree according to the
|
||||||
* the probe.
|
* result of the probe.
|
||||||
*
|
*
|
||||||
* This function has no idea how to scan and probe buses and devices at all.
|
* This function has no idea how to scan and probe buses and devices at all.
|
||||||
* It depends on the bus/device specific scan_bus() method to do it. The
|
* It depends on the bus/device specific scan_bus() method to do it. The
|
||||||
|
@ -899,16 +893,18 @@ unsigned int scan_bus(struct device *busdev, unsigned int max)
|
||||||
void dev_enumerate(void)
|
void dev_enumerate(void)
|
||||||
{
|
{
|
||||||
struct device *root;
|
struct device *root;
|
||||||
|
|
||||||
printk(BIOS_INFO, "Enumerating buses...\n");
|
printk(BIOS_INFO, "Enumerating buses...\n");
|
||||||
|
|
||||||
root = &dev_root;
|
root = &dev_root;
|
||||||
|
|
||||||
show_all_devs(BIOS_SPEW, "Before Device Enumeration.");
|
show_all_devs(BIOS_SPEW, "Before device enumeration.");
|
||||||
printk(BIOS_SPEW, "Compare with tree...\n");
|
printk(BIOS_SPEW, "Compare with tree...\n");
|
||||||
show_devs_tree(root, BIOS_SPEW, 0, 0);
|
show_devs_tree(root, BIOS_SPEW, 0, 0);
|
||||||
|
|
||||||
if (root->chip_ops && root->chip_ops->enable_dev) {
|
if (root->chip_ops && root->chip_ops->enable_dev)
|
||||||
root->chip_ops->enable_dev(root);
|
root->chip_ops->enable_dev(root);
|
||||||
}
|
|
||||||
if (!root->ops || !root->ops->scan_bus) {
|
if (!root->ops || !root->ops->scan_bus) {
|
||||||
printk(BIOS_ERR, "dev_root missing scan_bus operation");
|
printk(BIOS_ERR, "dev_root missing scan_bus operation");
|
||||||
return;
|
return;
|
||||||
|
@ -944,7 +940,8 @@ void dev_configure(void)
|
||||||
|
|
||||||
root = &dev_root;
|
root = &dev_root;
|
||||||
|
|
||||||
/* Each domain should create resources which contain the entire address
|
/*
|
||||||
|
* Each domain should create resources which contain the entire address
|
||||||
* space for IO, MEM, and PREFMEM resources in the domain. The
|
* space for IO, MEM, and PREFMEM resources in the domain. The
|
||||||
* allocation of device resources will be done from this address space.
|
* allocation of device resources will be done from this address space.
|
||||||
*/
|
*/
|
||||||
|
@ -987,7 +984,8 @@ void dev_configure(void)
|
||||||
if (child->path.type == DEVICE_PATH_PCI_DOMAIN)
|
if (child->path.type == DEVICE_PATH_PCI_DOMAIN)
|
||||||
avoid_fixed_resources(child);
|
avoid_fixed_resources(child);
|
||||||
|
|
||||||
/* Now we need to adjust the resources. MEM resources need to start at
|
/*
|
||||||
|
* Now we need to adjust the resources. MEM resources need to start at
|
||||||
* the highest address managable.
|
* the highest address managable.
|
||||||
*/
|
*/
|
||||||
for (child = root->link_list->children; child; child = child->sibling) {
|
for (child = root->link_list->children; child; child = child->sibling) {
|
||||||
|
@ -1045,7 +1043,7 @@ void dev_enable(void)
|
||||||
|
|
||||||
printk(BIOS_INFO, "Enabling resources...\n");
|
printk(BIOS_INFO, "Enabling resources...\n");
|
||||||
|
|
||||||
/* now enable everything. */
|
/* Now enable everything. */
|
||||||
for (link = dev_root.link_list; link; link = link->next)
|
for (link = dev_root.link_list; link; link = link->next)
|
||||||
enable_resources(link);
|
enable_resources(link);
|
||||||
|
|
||||||
|
@ -1055,17 +1053,16 @@ void dev_enable(void)
|
||||||
/**
|
/**
|
||||||
* Initialize a specific device.
|
* Initialize a specific device.
|
||||||
*
|
*
|
||||||
* The parent should be initialized first to avoid having an ordering
|
* The parent should be initialized first to avoid having an ordering problem.
|
||||||
* problem. This is done by calling the parent's init()
|
* This is done by calling the parent's init() method before its childrens'
|
||||||
* method before its childrens' init() methods.
|
* init() methods.
|
||||||
*
|
*
|
||||||
* @param dev The device to be initialized.
|
* @param dev The device to be initialized.
|
||||||
*/
|
*/
|
||||||
static void init_dev(struct device *dev)
|
static void init_dev(struct device *dev)
|
||||||
{
|
{
|
||||||
if (!dev->enabled) {
|
if (!dev->enabled)
|
||||||
return;
|
return;
|
||||||
}
|
|
||||||
|
|
||||||
if (!dev->initialized && dev->ops && dev->ops->init) {
|
if (!dev->initialized && dev->ops && dev->ops->init) {
|
||||||
if (dev->path.type == DEVICE_PATH_I2C) {
|
if (dev->path.type == DEVICE_PATH_I2C) {
|
||||||
|
@ -1084,16 +1081,14 @@ static void init_link(struct bus *link)
|
||||||
struct device *dev;
|
struct device *dev;
|
||||||
struct bus *c_link;
|
struct bus *c_link;
|
||||||
|
|
||||||
for (dev = link->children; dev; dev = dev->sibling) {
|
for (dev = link->children; dev; dev = dev->sibling)
|
||||||
init_dev(dev);
|
init_dev(dev);
|
||||||
}
|
|
||||||
|
|
||||||
for (dev = link->children; dev; dev = dev->sibling) {
|
for (dev = link->children; dev; dev = dev->sibling) {
|
||||||
for (c_link = dev->link_list; c_link; c_link = c_link->next) {
|
for (c_link = dev->link_list; c_link; c_link = c_link->next)
|
||||||
init_link(c_link);
|
init_link(c_link);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Initialize all devices in the global device tree.
|
* Initialize all devices in the global device tree.
|
||||||
|
@ -1110,7 +1105,7 @@ void dev_initialize(void)
|
||||||
/* First call the mainboard init. */
|
/* First call the mainboard init. */
|
||||||
init_dev(&dev_root);
|
init_dev(&dev_root);
|
||||||
|
|
||||||
/* now initialize everything. */
|
/* Now initialize everything. */
|
||||||
for (link = dev_root.link_list; link; link = link->next)
|
for (link = dev_root.link_list; link; link = link->next)
|
||||||
init_link(link);
|
init_link(link);
|
||||||
|
|
||||||
|
|
|
@ -41,10 +41,9 @@ device_t find_dev_path(struct bus *parent, struct device_path *path)
|
||||||
{
|
{
|
||||||
device_t child;
|
device_t child;
|
||||||
for (child = parent->children; child; child = child->sibling) {
|
for (child = parent->children; child; child = child->sibling) {
|
||||||
if (path_eq(path, &child->path)) {
|
if (path_eq(path, &child->path))
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
return child;
|
return child;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -59,9 +58,8 @@ device_t alloc_find_dev(struct bus *parent, struct device_path *path)
|
||||||
{
|
{
|
||||||
device_t child;
|
device_t child;
|
||||||
child = find_dev_path(parent, path);
|
child = find_dev_path(parent, path);
|
||||||
if (!child) {
|
if (!child)
|
||||||
child = alloc_dev(parent, path);
|
child = alloc_dev(parent, path);
|
||||||
}
|
|
||||||
return child;
|
return child;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -116,21 +114,21 @@ struct device *dev_find_slot_on_smbus(unsigned int bus, unsigned int addr)
|
||||||
*
|
*
|
||||||
* @param vendor A PCI vendor ID (e.g. 0x8086 for Intel).
|
* @param vendor A PCI vendor ID (e.g. 0x8086 for Intel).
|
||||||
* @param device A PCI device ID.
|
* @param device A PCI device ID.
|
||||||
* @param from Pointer to the device structure, used as a starting point
|
* @param from Pointer to the device structure, used as a starting point in
|
||||||
* in the linked list of all_devices, which can be 0 to start at the
|
* the linked list of all_devices, which can be 0 to start at the
|
||||||
* head of the list (i.e. all_devices).
|
* head of the list (i.e. all_devices).
|
||||||
* @return Pointer to the device struct.
|
* @return Pointer to the device struct.
|
||||||
*/
|
*/
|
||||||
struct device *dev_find_device(unsigned int vendor, unsigned int device,
|
struct device *dev_find_device(u16 vendor, u16 device, struct device *from)
|
||||||
struct device *from)
|
|
||||||
{
|
{
|
||||||
if (!from)
|
if (!from)
|
||||||
from = all_devices;
|
from = all_devices;
|
||||||
else
|
else
|
||||||
from = from->next;
|
from = from->next;
|
||||||
while (from && (from->vendor != vendor || from->device != device)) {
|
|
||||||
|
while (from && (from->vendor != vendor || from->device != device))
|
||||||
from = from->next;
|
from = from->next;
|
||||||
}
|
|
||||||
return from;
|
return from;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -138,8 +136,8 @@ struct device *dev_find_device(unsigned int vendor, unsigned int device,
|
||||||
* Find a device of a given class.
|
* Find a device of a given class.
|
||||||
*
|
*
|
||||||
* @param class Class of the device.
|
* @param class Class of the device.
|
||||||
* @param from Pointer to the device structure, used as a starting point
|
* @param from Pointer to the device structure, used as a starting point in
|
||||||
* in the linked list of all_devices, which can be 0 to start at the
|
* the linked list of all_devices, which can be 0 to start at the
|
||||||
* head of the list (i.e. all_devices).
|
* head of the list (i.e. all_devices).
|
||||||
* @return Pointer to the device struct.
|
* @return Pointer to the device struct.
|
||||||
*/
|
*/
|
||||||
|
@ -149,8 +147,10 @@ struct device *dev_find_class(unsigned int class, struct device *from)
|
||||||
from = all_devices;
|
from = all_devices;
|
||||||
else
|
else
|
||||||
from = from->next;
|
from = from->next;
|
||||||
|
|
||||||
while (from && (from->class & 0xffffff00) != class)
|
while (from && (from->class & 0xffffff00) != class)
|
||||||
from = from->next;
|
from = from->next;
|
||||||
|
|
||||||
return from;
|
return from;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -165,8 +165,7 @@ const char *dev_path(device_t dev)
|
||||||
buffer[0] = '\0';
|
buffer[0] = '\0';
|
||||||
if (!dev) {
|
if (!dev) {
|
||||||
memcpy(buffer, "<null>", 7);
|
memcpy(buffer, "<null>", 7);
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
switch(dev->path.type) {
|
switch(dev->path.type) {
|
||||||
case DEVICE_PATH_ROOT:
|
case DEVICE_PATH_ROOT:
|
||||||
memcpy(buffer, "Root Device", 12);
|
memcpy(buffer, "Root Device", 12);
|
||||||
|
@ -174,12 +173,15 @@ const char *dev_path(device_t dev)
|
||||||
case DEVICE_PATH_PCI:
|
case DEVICE_PATH_PCI:
|
||||||
#if CONFIG_PCI_BUS_SEGN_BITS
|
#if CONFIG_PCI_BUS_SEGN_BITS
|
||||||
sprintf(buffer, "PCI: %04x:%02x:%02x.%01x",
|
sprintf(buffer, "PCI: %04x:%02x:%02x.%01x",
|
||||||
dev->bus->secondary>>8, dev->bus->secondary & 0xff,
|
dev->bus->secondary >> 8,
|
||||||
PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
|
dev->bus->secondary & 0xff,
|
||||||
|
PCI_SLOT(dev->path.pci.devfn),
|
||||||
|
PCI_FUNC(dev->path.pci.devfn));
|
||||||
#else
|
#else
|
||||||
sprintf(buffer, "PCI: %02x:%02x.%01x",
|
sprintf(buffer, "PCI: %02x:%02x.%01x",
|
||||||
dev->bus->secondary,
|
dev->bus->secondary,
|
||||||
PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
|
PCI_SLOT(dev->path.pci.devfn),
|
||||||
|
PCI_FUNC(dev->path.pci.devfn));
|
||||||
#endif
|
#endif
|
||||||
break;
|
break;
|
||||||
case DEVICE_PATH_PNP:
|
case DEVICE_PATH_PNP:
|
||||||
|
@ -210,7 +212,8 @@ const char *dev_path(device_t dev)
|
||||||
sprintf(buffer, "CPU_BUS: %02x", dev->path.cpu_bus.id);
|
sprintf(buffer, "CPU_BUS: %02x", dev->path.cpu_bus.id);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
printk(BIOS_ERR, "Unknown device path type: %d\n", dev->path.type);
|
printk(BIOS_ERR, "Unknown device path type: %d\n",
|
||||||
|
dev->path.type);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -227,7 +230,10 @@ const char *bus_path(struct bus *bus)
|
||||||
int path_eq(struct device_path *path1, struct device_path *path2)
|
int path_eq(struct device_path *path1, struct device_path *path2)
|
||||||
{
|
{
|
||||||
int equal = 0;
|
int equal = 0;
|
||||||
if (path1->type == path2->type) {
|
|
||||||
|
if (path1->type != path2->type)
|
||||||
|
return 0;
|
||||||
|
|
||||||
switch (path1->type) {
|
switch (path1->type) {
|
||||||
case DEVICE_PATH_NONE:
|
case DEVICE_PATH_NONE:
|
||||||
break;
|
break;
|
||||||
|
@ -251,7 +257,8 @@ int path_eq(struct device_path *path1, struct device_path *path2)
|
||||||
equal = (path1->pci_domain.domain == path2->pci_domain.domain);
|
equal = (path1->pci_domain.domain == path2->pci_domain.domain);
|
||||||
break;
|
break;
|
||||||
case DEVICE_PATH_APIC_CLUSTER:
|
case DEVICE_PATH_APIC_CLUSTER:
|
||||||
equal = (path1->apic_cluster.cluster == path2->apic_cluster.cluster);
|
equal = (path1->apic_cluster.cluster
|
||||||
|
== path2->apic_cluster.cluster);
|
||||||
break;
|
break;
|
||||||
case DEVICE_PATH_CPU:
|
case DEVICE_PATH_CPU:
|
||||||
equal = (path1->cpu.id == path2->cpu.id);
|
equal = (path1->cpu.id == path2->cpu.id);
|
||||||
|
@ -263,7 +270,7 @@ int path_eq(struct device_path *path1, struct device_path *path2)
|
||||||
printk(BIOS_ERR, "Uknown device type: %d\n", path1->type);
|
printk(BIOS_ERR, "Uknown device type: %d\n", path1->type);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
return equal;
|
return equal;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -276,6 +283,7 @@ static int allocate_more_resources(void)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
struct resource *new_res_list;
|
struct resource *new_res_list;
|
||||||
|
|
||||||
new_res_list = malloc(64 * sizeof(*new_res_list));
|
new_res_list = malloc(64 * sizeof(*new_res_list));
|
||||||
|
|
||||||
if (new_res_list == NULL)
|
if (new_res_list == NULL)
|
||||||
|
@ -305,12 +313,14 @@ static void free_resource(device_t dev, struct resource *res,
|
||||||
prev->next = res->next;
|
prev->next = res->next;
|
||||||
else
|
else
|
||||||
dev->resource_list = res->next;
|
dev->resource_list = res->next;
|
||||||
|
|
||||||
res->next = free_resources;
|
res->next = free_resources;
|
||||||
free_resources = res;
|
free_resources = res;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* See if we have unused but allocated resource structures.
|
* See if we have unused but allocated resource structures.
|
||||||
|
*
|
||||||
* If so remove the allocation.
|
* If so remove the allocation.
|
||||||
*
|
*
|
||||||
* @param dev The device to find the resource on.
|
* @param dev The device to find the resource on.
|
||||||
|
@ -318,6 +328,7 @@ static void free_resource(device_t dev, struct resource *res,
|
||||||
void compact_resources(device_t dev)
|
void compact_resources(device_t dev)
|
||||||
{
|
{
|
||||||
struct resource *res, *next, *prev = NULL;
|
struct resource *res, *next, *prev = NULL;
|
||||||
|
|
||||||
/* Move all of the free resources to the end */
|
/* Move all of the free resources to the end */
|
||||||
for (res = dev->resource_list; res; res = next) {
|
for (res = dev->resource_list; res; res = next) {
|
||||||
next = res->next;
|
next = res->next;
|
||||||
|
@ -344,6 +355,7 @@ struct resource *probe_resource(device_t dev, unsigned index)
|
||||||
if (res->index == index)
|
if (res->index == index)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
return res;
|
return res;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -361,10 +373,10 @@ struct resource *new_resource(device_t dev, unsigned index)
|
||||||
{
|
{
|
||||||
struct resource *resource, *tail;
|
struct resource *resource, *tail;
|
||||||
|
|
||||||
/* First move all of the free resources to the end */
|
/* First move all of the free resources to the end. */
|
||||||
compact_resources(dev);
|
compact_resources(dev);
|
||||||
|
|
||||||
/* See if there is a resource with the appropriate index */
|
/* See if there is a resource with the appropriate index. */
|
||||||
resource = probe_resource(dev, index);
|
resource = probe_resource(dev, index);
|
||||||
if (!resource) {
|
if (!resource) {
|
||||||
if (free_resources == NULL && !allocate_more_resources())
|
if (free_resources == NULL && !allocate_more_resources())
|
||||||
|
@ -378,11 +390,12 @@ struct resource *new_resource(device_t dev, unsigned index)
|
||||||
if (tail) {
|
if (tail) {
|
||||||
while (tail->next) tail = tail->next;
|
while (tail->next) tail = tail->next;
|
||||||
tail->next = resource;
|
tail->next = resource;
|
||||||
}
|
} else {
|
||||||
else
|
|
||||||
dev->resource_list = resource;
|
dev->resource_list = resource;
|
||||||
}
|
}
|
||||||
/* Initialize the resource values */
|
}
|
||||||
|
|
||||||
|
/* Initialize the resource values. */
|
||||||
if (!(resource->flags & IORESOURCE_FIXED)) {
|
if (!(resource->flags & IORESOURCE_FIXED)) {
|
||||||
resource->flags = 0;
|
resource->flags = 0;
|
||||||
resource->base = 0;
|
resource->base = 0;
|
||||||
|
@ -407,7 +420,7 @@ struct resource *find_resource(device_t dev, unsigned index)
|
||||||
{
|
{
|
||||||
struct resource *resource;
|
struct resource *resource;
|
||||||
|
|
||||||
/* See if there is a resource with the appropriate index */
|
/* See if there is a resource with the appropriate index. */
|
||||||
resource = probe_resource(dev, index);
|
resource = probe_resource(dev, index);
|
||||||
if (!resource) {
|
if (!resource) {
|
||||||
printk(BIOS_EMERG, "%s missing resource: %02x\n",
|
printk(BIOS_EMERG, "%s missing resource: %02x\n",
|
||||||
|
@ -417,7 +430,6 @@ struct resource *find_resource(device_t dev, unsigned index)
|
||||||
return resource;
|
return resource;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Round a number up to the next multiple of gran.
|
* Round a number up to the next multiple of gran.
|
||||||
*
|
*
|
||||||
|
@ -458,16 +470,18 @@ static resource_t align_down(resource_t val, unsigned long gran)
|
||||||
resource_t resource_end(struct resource *resource)
|
resource_t resource_end(struct resource *resource)
|
||||||
{
|
{
|
||||||
resource_t base, end;
|
resource_t base, end;
|
||||||
/* get the base address */
|
|
||||||
|
/* Get the base address. */
|
||||||
base = resource->base;
|
base = resource->base;
|
||||||
|
|
||||||
/* For a non bridge resource granularity and alignment are the same.
|
/*
|
||||||
|
* For a non bridge resource granularity and alignment are the same.
|
||||||
* For a bridge resource align is the largest needed alignment below
|
* For a bridge resource align is the largest needed alignment below
|
||||||
* the bridge. While the granularity is simply how many low bits of the
|
* the bridge. While the granularity is simply how many low bits of
|
||||||
* address cannot be set.
|
* the address cannot be set.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Get the end (rounded up) */
|
/* Get the end (rounded up). */
|
||||||
end = base + align_up(resource->size, resource->gran) - 1;
|
end = base + align_up(resource->size, resource->gran) - 1;
|
||||||
|
|
||||||
return end;
|
return end;
|
||||||
|
@ -519,52 +533,58 @@ const char *resource_type(struct resource *resource)
|
||||||
void report_resource_stored(device_t dev, struct resource *resource,
|
void report_resource_stored(device_t dev, struct resource *resource,
|
||||||
const char *comment)
|
const char *comment)
|
||||||
{
|
{
|
||||||
if (resource->flags & IORESOURCE_STORED) {
|
|
||||||
char buf[10];
|
char buf[10];
|
||||||
unsigned long long base, end;
|
unsigned long long base, end;
|
||||||
|
|
||||||
|
if (!(resource->flags & IORESOURCE_STORED))
|
||||||
|
return;
|
||||||
|
|
||||||
base = resource->base;
|
base = resource->base;
|
||||||
end = resource_end(resource);
|
end = resource_end(resource);
|
||||||
buf[0] = '\0';
|
buf[0] = '\0';
|
||||||
|
|
||||||
if (resource->flags & IORESOURCE_PCI_BRIDGE) {
|
if (resource->flags & IORESOURCE_PCI_BRIDGE) {
|
||||||
#if CONFIG_PCI_BUS_SEGN_BITS
|
#if CONFIG_PCI_BUS_SEGN_BITS
|
||||||
sprintf(buf, "bus %04x:%02x ", dev->bus->secondary>>8, dev->link_list->secondary & 0xff);
|
sprintf(buf, "bus %04x:%02x ", dev->bus->secondary >> 8,
|
||||||
|
dev->link_list->secondary & 0xff);
|
||||||
#else
|
#else
|
||||||
sprintf(buf, "bus %02x ", dev->link_list->secondary);
|
sprintf(buf, "bus %02x ", dev->link_list->secondary);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
printk(BIOS_DEBUG,
|
printk(BIOS_DEBUG, "%s %02lx <- [0x%010Lx - 0x%010Lx] size 0x%08Lx "
|
||||||
"%s %02lx <- [0x%010Lx - 0x%010Lx] size 0x%08Lx gran 0x%02x %s%s%s\n",
|
"gran 0x%02x %s%s%s\n", dev_path(dev), resource->index,
|
||||||
dev_path(dev),
|
base, end, resource->size, resource->gran, buf,
|
||||||
resource->index,
|
resource_type(resource), comment);
|
||||||
base, end,
|
|
||||||
resource->size, resource->gran,
|
|
||||||
buf,
|
|
||||||
resource_type(resource),
|
|
||||||
comment);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void search_bus_resources(struct bus *bus,
|
void search_bus_resources(struct bus *bus, unsigned long type_mask,
|
||||||
unsigned long type_mask, unsigned long type,
|
unsigned long type, resource_search_t search,
|
||||||
resource_search_t search, void *gp)
|
void *gp)
|
||||||
{
|
{
|
||||||
struct device *curdev;
|
struct device *curdev;
|
||||||
|
|
||||||
for (curdev = bus->children; curdev; curdev = curdev->sibling) {
|
for (curdev = bus->children; curdev; curdev = curdev->sibling) {
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
/* Ignore disabled devices */
|
|
||||||
if (!curdev->enabled) continue;
|
/* Ignore disabled devices. */
|
||||||
for (res = curdev->resource_list; res; res = res->next) {
|
if (!curdev->enabled)
|
||||||
/* If it isn't the right kind of resource ignore it */
|
|
||||||
if ((res->flags & type_mask) != type) {
|
|
||||||
continue;
|
continue;
|
||||||
}
|
|
||||||
/* If it is a subtractive resource recurse */
|
for (res = curdev->resource_list; res; res = res->next) {
|
||||||
|
/* If it isn't the right kind of resource ignore it. */
|
||||||
|
if ((res->flags & type_mask) != type)
|
||||||
|
continue;
|
||||||
|
|
||||||
|
/* If it is a subtractive resource recurse. */
|
||||||
if (res->flags & IORESOURCE_SUBTRACTIVE) {
|
if (res->flags & IORESOURCE_SUBTRACTIVE) {
|
||||||
struct bus * subbus;
|
struct bus * subbus;
|
||||||
for (subbus = curdev->link_list; subbus; subbus = subbus->next)
|
for (subbus = curdev->link_list; subbus;
|
||||||
if (subbus->link_num == IOINDEX_SUBTRACTIVE_LINK(res->index))
|
subbus = subbus->next)
|
||||||
|
if (subbus->link_num
|
||||||
|
== IOINDEX_SUBTRACTIVE_LINK(res->index))
|
||||||
break;
|
break;
|
||||||
search_bus_resources(subbus, type_mask, type, search, gp);
|
search_bus_resources(subbus, type_mask, type,
|
||||||
|
search, gp);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
search(gp, curdev, res);
|
search(gp, curdev, res);
|
||||||
|
@ -572,24 +592,27 @@ void search_bus_resources(struct bus *bus,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void search_global_resources(
|
void search_global_resources(unsigned long type_mask, unsigned long type,
|
||||||
unsigned long type_mask, unsigned long type,
|
|
||||||
resource_search_t search, void *gp)
|
resource_search_t search, void *gp)
|
||||||
{
|
{
|
||||||
struct device *curdev;
|
struct device *curdev;
|
||||||
|
|
||||||
for (curdev = all_devices; curdev; curdev = curdev->next) {
|
for (curdev = all_devices; curdev; curdev = curdev->next) {
|
||||||
struct resource *res;
|
struct resource *res;
|
||||||
/* Ignore disabled devices */
|
|
||||||
if (!curdev->enabled) continue;
|
/* Ignore disabled devices. */
|
||||||
|
if (!curdev->enabled)
|
||||||
|
continue;
|
||||||
|
|
||||||
for (res = curdev->resource_list; res; res = res->next) {
|
for (res = curdev->resource_list; res; res = res->next) {
|
||||||
/* If it isn't the right kind of resource ignore it */
|
/* If it isn't the right kind of resource ignore it. */
|
||||||
if ((res->flags & type_mask) != type) {
|
if ((res->flags & type_mask) != type)
|
||||||
continue;
|
continue;
|
||||||
}
|
|
||||||
/* If it is a subtractive resource ignore it */
|
/* If it is a subtractive resource ignore it. */
|
||||||
if (res->flags & IORESOURCE_SUBTRACTIVE) {
|
if (res->flags & IORESOURCE_SUBTRACTIVE)
|
||||||
continue;
|
continue;
|
||||||
}
|
|
||||||
search(gp, curdev, res);
|
search(gp, curdev, res);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -597,14 +620,13 @@ void search_global_resources(
|
||||||
|
|
||||||
void dev_set_enabled(device_t dev, int enable)
|
void dev_set_enabled(device_t dev, int enable)
|
||||||
{
|
{
|
||||||
if (dev->enabled == enable) {
|
if (dev->enabled == enable)
|
||||||
return;
|
return;
|
||||||
}
|
|
||||||
dev->enabled = enable;
|
dev->enabled = enable;
|
||||||
if (dev->ops && dev->ops->enable) {
|
if (dev->ops && dev->ops->enable) {
|
||||||
dev->ops->enable(dev);
|
dev->ops->enable(dev);
|
||||||
}
|
} else if (dev->chip_ops && dev->chip_ops->enable_dev) {
|
||||||
else if (dev->chip_ops && dev->chip_ops->enable_dev) {
|
|
||||||
dev->chip_ops->enable_dev(dev);
|
dev->chip_ops->enable_dev(dev);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -612,11 +634,11 @@ void dev_set_enabled(device_t dev, int enable)
|
||||||
void disable_children(struct bus *bus)
|
void disable_children(struct bus *bus)
|
||||||
{
|
{
|
||||||
device_t child;
|
device_t child;
|
||||||
|
|
||||||
for (child = bus->children; child; child = child->sibling) {
|
for (child = bus->children; child; child = child->sibling) {
|
||||||
struct bus *link;
|
struct bus *link;
|
||||||
for (link = child->link_list; link; link = link->next) {
|
for (link = child->link_list; link; link = link->next)
|
||||||
disable_children(link);
|
disable_children(link);
|
||||||
}
|
|
||||||
dev_set_enabled(child, 0);
|
dev_set_enabled(child, 0);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -640,12 +662,11 @@ static void resource_tree(struct device *root, int debug_level, int depth)
|
||||||
do_printk(BIOS_DEBUG, "\n");
|
do_printk(BIOS_DEBUG, "\n");
|
||||||
|
|
||||||
for (res = root->resource_list; res; res = res->next) {
|
for (res = root->resource_list; res; res = res->next) {
|
||||||
do_printk(debug_level,
|
do_printk(debug_level, "%s%s resource base %llx size %llx "
|
||||||
"%s%s resource base %llx size %llx align %d gran %d limit %llx flags %lx index %lx\n",
|
"align %d gran %d limit %llx flags %lx index %lx\n",
|
||||||
indent, dev_path(root), res->base,
|
indent, dev_path(root), res->base, res->size,
|
||||||
res->size, res->align,
|
res->align, res->gran, res->limit, res->flags,
|
||||||
res->gran, res->limit,
|
res->index);
|
||||||
res->flags, res->index);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
for (link = root->link_list; link; link = link->next) {
|
for (link = root->link_list; link; link = link->next) {
|
||||||
|
@ -654,8 +675,7 @@ static void resource_tree(struct device *root, int debug_level, int depth)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void print_resource_tree(struct device * root, int debug_level,
|
void print_resource_tree(struct device *root, int debug_level, const char *msg)
|
||||||
const char *msg)
|
|
||||||
{
|
{
|
||||||
/* Bail if root is null. */
|
/* Bail if root is null. */
|
||||||
if (!root) {
|
if (!root) {
|
||||||
|
@ -667,6 +687,7 @@ void print_resource_tree(struct device * root, int debug_level,
|
||||||
if (!do_printk(debug_level, "Show resources in subtree (%s)...%s\n",
|
if (!do_printk(debug_level, "Show resources in subtree (%s)...%s\n",
|
||||||
dev_path(root), msg))
|
dev_path(root), msg))
|
||||||
return;
|
return;
|
||||||
|
|
||||||
resource_tree(root, debug_level, 0);
|
resource_tree(root, debug_level, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -680,8 +701,10 @@ void show_devs_tree(struct device *dev, int debug_level, int depth, int linknum)
|
||||||
for (i = 0; i < depth; i++)
|
for (i = 0; i < depth; i++)
|
||||||
depth_str[i] = ' ';
|
depth_str[i] = ' ';
|
||||||
depth_str[i] = '\0';
|
depth_str[i] = '\0';
|
||||||
|
|
||||||
do_printk(debug_level, "%s%s: enabled %d\n",
|
do_printk(debug_level, "%s%s: enabled %d\n",
|
||||||
depth_str, dev_path(dev), dev->enabled);
|
depth_str, dev_path(dev), dev->enabled);
|
||||||
|
|
||||||
for (link = dev->link_list; link; link = link->next) {
|
for (link = dev->link_list; link; link = link->next) {
|
||||||
for (sibling = link->children; sibling;
|
for (sibling = link->children; sibling;
|
||||||
sibling = sibling->sibling)
|
sibling = sibling->sibling)
|
||||||
|
@ -728,6 +751,7 @@ void show_one_resource(int debug_level, struct device *dev,
|
||||||
base = resource->base;
|
base = resource->base;
|
||||||
end = resource_end(resource);
|
end = resource_end(resource);
|
||||||
buf[0] = '\0';
|
buf[0] = '\0';
|
||||||
|
|
||||||
/*
|
/*
|
||||||
if (resource->flags & IORESOURCE_BRIDGE) {
|
if (resource->flags & IORESOURCE_BRIDGE) {
|
||||||
#if CONFIG_PCI_BUS_SEGN_BITS
|
#if CONFIG_PCI_BUS_SEGN_BITS
|
||||||
|
@ -738,12 +762,11 @@ void show_one_resource(int debug_level, struct device *dev,
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
*/
|
*/
|
||||||
do_printk(debug_level, "%s %02lx <- [0x%010llx - 0x%010llx] "
|
|
||||||
"size 0x%08Lx gran 0x%02x %s%s%s\n",
|
|
||||||
dev_path(dev), resource->index, base, end,
|
|
||||||
resource->size, resource->gran, buf,
|
|
||||||
resource_type(resource), comment);
|
|
||||||
|
|
||||||
|
do_printk(debug_level, "%s %02lx <- [0x%010llx - 0x%010llx] "
|
||||||
|
"size 0x%08Lx gran 0x%02x %s%s%s\n", dev_path(dev),
|
||||||
|
resource->index, base, end, resource->size, resource->gran,
|
||||||
|
buf, resource_type(resource), comment);
|
||||||
}
|
}
|
||||||
|
|
||||||
void show_all_devs_resources(int debug_level, const char* msg)
|
void show_all_devs_resources(int debug_level, const char* msg)
|
||||||
|
|
|
@ -44,10 +44,13 @@
|
||||||
static device_t ht_scan_get_devs(device_t *old_devices)
|
static device_t ht_scan_get_devs(device_t *old_devices)
|
||||||
{
|
{
|
||||||
device_t first, last;
|
device_t first, last;
|
||||||
|
|
||||||
first = *old_devices;
|
first = *old_devices;
|
||||||
last = first;
|
last = first;
|
||||||
/* Extract the chain of devices to (first through last)
|
|
||||||
* for the next hypertransport device.
|
/*
|
||||||
|
* Extract the chain of devices to (first through last) for the next
|
||||||
|
* hypertransport device.
|
||||||
*/
|
*/
|
||||||
while (last && last->sibling &&
|
while (last && last->sibling &&
|
||||||
(last->sibling->path.type == DEVICE_PATH_PCI) &&
|
(last->sibling->path.type == DEVICE_PATH_PCI) &&
|
||||||
|
@ -55,60 +58,64 @@ static device_t ht_scan_get_devs(device_t *old_devices)
|
||||||
{
|
{
|
||||||
last = last->sibling;
|
last = last->sibling;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (first) {
|
if (first) {
|
||||||
device_t child;
|
device_t child;
|
||||||
/* Unlink the chain from the list of old devices */
|
|
||||||
|
/* Unlink the chain from the list of old devices. */
|
||||||
*old_devices = last->sibling;
|
*old_devices = last->sibling;
|
||||||
last->sibling = 0;
|
last->sibling = 0;
|
||||||
|
|
||||||
/* Now add the device to the list of devices on the bus.
|
/* Now add the device to the list of devices on the bus. */
|
||||||
*/
|
/* Find the last child of our parent. */
|
||||||
/* Find the last child of our parent */
|
for (child = first->bus->children; child && child->sibling; )
|
||||||
for(child = first->bus->children; child && child->sibling; ) {
|
|
||||||
child = child->sibling;
|
child = child->sibling;
|
||||||
}
|
|
||||||
/* Place the chain on the list of children of their parent. */
|
/* Place the chain on the list of children of their parent. */
|
||||||
if (child) {
|
if (child)
|
||||||
child->sibling = first;
|
child->sibling = first;
|
||||||
} else {
|
else
|
||||||
first->bus->children = first;
|
first->bus->children = first;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
return first;
|
return first;
|
||||||
}
|
}
|
||||||
|
|
||||||
#if OPT_HT_LINK == 1
|
#if OPT_HT_LINK == 1
|
||||||
static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
|
static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
|
||||||
{
|
{
|
||||||
/* Handle bugs in valid hypertransport frequency reporting */
|
/* Handle bugs in valid hypertransport frequency reporting. */
|
||||||
unsigned freq_cap;
|
unsigned freq_cap;
|
||||||
|
|
||||||
freq_cap = pci_read_config16(dev, pos);
|
freq_cap = pci_read_config16(dev, pos);
|
||||||
freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */
|
freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies. */
|
||||||
|
|
||||||
/* AMD 8131 Errata 48 */
|
/* AMD 8131 Errata 48. */
|
||||||
if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
|
if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
|
||||||
(dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
|
(dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
|
||||||
freq_cap &= ~(1 << HT_FREQ_800Mhz);
|
freq_cap &= ~(1 << HT_FREQ_800Mhz);
|
||||||
}
|
}
|
||||||
/* AMD 8151 Errata 23 */
|
|
||||||
|
/* AMD 8151 Errata 23. */
|
||||||
if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
|
if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
|
||||||
(dev->device == PCI_DEVICE_ID_AMD_8151_SYSCTRL)) {
|
(dev->device == PCI_DEVICE_ID_AMD_8151_SYSCTRL)) {
|
||||||
freq_cap &= ~(1 << HT_FREQ_800Mhz);
|
freq_cap &= ~(1 << HT_FREQ_800Mhz);
|
||||||
}
|
}
|
||||||
/* AMD K8 Unsupported 1Ghz? */
|
|
||||||
|
/* AMD K8 unsupported 1GHz? */
|
||||||
if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
|
if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
|
||||||
#if CONFIG_K8_HT_FREQ_1G_SUPPORT == 1
|
#if CONFIG_K8_HT_FREQ_1G_SUPPORT == 1
|
||||||
|
|
||||||
#if CONFIG_K8_REV_F_SUPPORT == 0
|
#if CONFIG_K8_REV_F_SUPPORT == 0
|
||||||
if (is_cpu_pre_e0()) { // only e0 later suupport 1GHz HT
|
/* Only e0 later suupport 1GHz HT. */
|
||||||
freq_cap &= ~(1 << HT_FREQ_1000Mhz);
|
if (is_cpu_pre_e0())
|
||||||
}
|
|
||||||
#endif
|
|
||||||
#else
|
|
||||||
freq_cap &= ~(1 << HT_FREQ_1000Mhz);
|
freq_cap &= ~(1 << HT_FREQ_1000Mhz);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#else
|
||||||
|
freq_cap &= ~(1 << HT_FREQ_1000Mhz);
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
return freq_cap;
|
return freq_cap;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@ -122,8 +129,8 @@ struct ht_link {
|
||||||
static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
|
static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
|
||||||
{
|
{
|
||||||
#if OPT_HT_LINK == 1
|
#if OPT_HT_LINK == 1
|
||||||
static const uint8_t link_width_to_pow2[]= { 3, 4, 0, 5, 1, 2, 0, 0 };
|
static const u8 link_width_to_pow2[] = { 3, 4, 0, 5, 1, 2, 0, 0 };
|
||||||
static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 };
|
static const u8 pow2_to_link_width[] = { 7, 4, 5, 0, 1, 3 };
|
||||||
unsigned present_width_cap, upstream_width_cap;
|
unsigned present_width_cap, upstream_width_cap;
|
||||||
unsigned present_freq_cap, upstream_freq_cap;
|
unsigned present_freq_cap, upstream_freq_cap;
|
||||||
unsigned ln_present_width_in, ln_upstream_width_in;
|
unsigned ln_present_width_in, ln_upstream_width_in;
|
||||||
|
@ -135,54 +142,60 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
|
||||||
int reset_needed;
|
int reset_needed;
|
||||||
int linkb_to_host;
|
int linkb_to_host;
|
||||||
|
|
||||||
/* Set the hypertransport link width and frequency */
|
/* Set the hypertransport link width and frequency. */
|
||||||
reset_needed = 0;
|
reset_needed = 0;
|
||||||
/* See which side of the device our previous write to
|
/*
|
||||||
* set the unitid came from.
|
* See which side of the device our previous write to set the unitid
|
||||||
|
* came from.
|
||||||
*/
|
*/
|
||||||
cur->dev = dev;
|
cur->dev = dev;
|
||||||
cur->pos = pos;
|
cur->pos = pos;
|
||||||
linkb_to_host = (pci_read_config16(cur->dev, cur->pos + PCI_CAP_FLAGS) >> 10) & 1;
|
linkb_to_host =
|
||||||
|
(pci_read_config16(cur->dev, cur->pos + PCI_CAP_FLAGS) >> 10) & 1;
|
||||||
|
|
||||||
if (!linkb_to_host) {
|
if (!linkb_to_host) {
|
||||||
cur->ctrl_off = PCI_HT_CAP_SLAVE_CTRL0;
|
cur->ctrl_off = PCI_HT_CAP_SLAVE_CTRL0;
|
||||||
cur->config_off = PCI_HT_CAP_SLAVE_WIDTH0;
|
cur->config_off = PCI_HT_CAP_SLAVE_WIDTH0;
|
||||||
cur->freq_off = PCI_HT_CAP_SLAVE_FREQ0;
|
cur->freq_off = PCI_HT_CAP_SLAVE_FREQ0;
|
||||||
cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
|
cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
|
||||||
}
|
} else {
|
||||||
else {
|
|
||||||
cur->ctrl_off = PCI_HT_CAP_SLAVE_CTRL1;
|
cur->ctrl_off = PCI_HT_CAP_SLAVE_CTRL1;
|
||||||
cur->config_off = PCI_HT_CAP_SLAVE_WIDTH1;
|
cur->config_off = PCI_HT_CAP_SLAVE_WIDTH1;
|
||||||
cur->freq_off = PCI_HT_CAP_SLAVE_FREQ1;
|
cur->freq_off = PCI_HT_CAP_SLAVE_FREQ1;
|
||||||
cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
|
cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
|
||||||
}
|
}
|
||||||
#if OPT_HT_LINK == 1
|
|
||||||
/* Read the capabilities */
|
|
||||||
present_freq_cap = ht_read_freq_cap(cur->dev, cur->pos + cur->freq_cap_off);
|
|
||||||
upstream_freq_cap = ht_read_freq_cap(prev->dev, prev->pos + prev->freq_cap_off);
|
|
||||||
present_width_cap = pci_read_config8(cur->dev, cur->pos + cur->config_off);
|
|
||||||
upstream_width_cap = pci_read_config8(prev->dev, prev->pos + prev->config_off);
|
|
||||||
|
|
||||||
/* Calculate the highest useable frequency */
|
#if OPT_HT_LINK == 1
|
||||||
|
/* Read the capabilities. */
|
||||||
|
present_freq_cap =
|
||||||
|
ht_read_freq_cap(cur->dev, cur->pos + cur->freq_cap_off);
|
||||||
|
upstream_freq_cap =
|
||||||
|
ht_read_freq_cap(prev->dev, prev->pos + prev->freq_cap_off);
|
||||||
|
present_width_cap =
|
||||||
|
pci_read_config8(cur->dev, cur->pos + cur->config_off);
|
||||||
|
upstream_width_cap =
|
||||||
|
pci_read_config8(prev->dev, prev->pos + prev->config_off);
|
||||||
|
|
||||||
|
/* Calculate the highest useable frequency. */
|
||||||
freq = log2(present_freq_cap & upstream_freq_cap);
|
freq = log2(present_freq_cap & upstream_freq_cap);
|
||||||
|
|
||||||
/* Calculate the highest width */
|
/* Calculate the highest width. */
|
||||||
ln_upstream_width_in = link_width_to_pow2[upstream_width_cap & 7];
|
ln_upstream_width_in = link_width_to_pow2[upstream_width_cap & 7];
|
||||||
ln_present_width_out = link_width_to_pow2[(present_width_cap >> 4) & 7];
|
ln_present_width_out = link_width_to_pow2[(present_width_cap >> 4) & 7];
|
||||||
if (ln_upstream_width_in > ln_present_width_out) {
|
if (ln_upstream_width_in > ln_present_width_out)
|
||||||
ln_upstream_width_in = ln_present_width_out;
|
ln_upstream_width_in = ln_present_width_out;
|
||||||
}
|
|
||||||
upstream_width = pow2_to_link_width[ln_upstream_width_in];
|
upstream_width = pow2_to_link_width[ln_upstream_width_in];
|
||||||
present_width = pow2_to_link_width[ln_upstream_width_in] << 4;
|
present_width = pow2_to_link_width[ln_upstream_width_in] << 4;
|
||||||
|
|
||||||
ln_upstream_width_out = link_width_to_pow2[(upstream_width_cap >> 4) & 7];
|
ln_upstream_width_out =
|
||||||
|
link_width_to_pow2[(upstream_width_cap >> 4) & 7];
|
||||||
ln_present_width_in = link_width_to_pow2[present_width_cap & 7];
|
ln_present_width_in = link_width_to_pow2[present_width_cap & 7];
|
||||||
if (ln_upstream_width_out > ln_present_width_in) {
|
if (ln_upstream_width_out > ln_present_width_in)
|
||||||
ln_upstream_width_out = ln_present_width_in;
|
ln_upstream_width_out = ln_present_width_in;
|
||||||
}
|
|
||||||
upstream_width |= pow2_to_link_width[ln_upstream_width_out] << 4;
|
upstream_width |= pow2_to_link_width[ln_upstream_width_out] << 4;
|
||||||
present_width |= pow2_to_link_width[ln_upstream_width_out];
|
present_width |= pow2_to_link_width[ln_upstream_width_out];
|
||||||
|
|
||||||
/* Set the current device */
|
/* Set the current device. */
|
||||||
old_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
|
old_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
|
||||||
old_freq &= 0x0f;
|
old_freq &= 0x0f;
|
||||||
if (freq != old_freq) {
|
if (freq != old_freq) {
|
||||||
|
@ -193,7 +206,8 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
|
||||||
new_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
|
new_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
|
||||||
new_freq &= 0x0f;
|
new_freq &= 0x0f;
|
||||||
if (new_freq != freq) {
|
if (new_freq != freq) {
|
||||||
printk(BIOS_ERR, "%s Hypertransport frequency would not set wanted: %x got: %x\n",
|
printk(BIOS_ERR, "%s Hypertransport frequency would "
|
||||||
|
"not set. Wanted: %x, got: %x\n",
|
||||||
dev_path(dev), freq, new_freq);
|
dev_path(dev), freq, new_freq);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -203,45 +217,57 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
|
||||||
pci_write_config8(cur->dev, cur->pos + cur->config_off + 1,
|
pci_write_config8(cur->dev, cur->pos + cur->config_off + 1,
|
||||||
present_width);
|
present_width);
|
||||||
reset_needed = 1;
|
reset_needed = 1;
|
||||||
printk(BIOS_SPEW, "HyperT widthP old %x new %x\n",old_width, present_width);
|
printk(BIOS_SPEW, "HyperT widthP old %x new %x\n",
|
||||||
new_width = pci_read_config8(cur->dev, cur->pos + cur->config_off + 1);
|
old_width, present_width);
|
||||||
|
new_width = pci_read_config8(cur->dev,
|
||||||
|
cur->pos + cur->config_off + 1);
|
||||||
if (new_width != present_width) {
|
if (new_width != present_width) {
|
||||||
printk(BIOS_ERR, "%s Hypertransport width would not set wanted: %x got: %x\n",
|
printk(BIOS_ERR, "%s Hypertransport width would not "
|
||||||
|
"set. Wanted: %x, got: %x\n",
|
||||||
dev_path(dev), present_width, new_width);
|
dev_path(dev), present_width, new_width);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Set the upstream device */
|
/* Set the upstream device. */
|
||||||
old_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
|
old_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
|
||||||
old_freq &= 0x0f;
|
old_freq &= 0x0f;
|
||||||
if (freq != old_freq) {
|
if (freq != old_freq) {
|
||||||
unsigned new_freq;
|
unsigned new_freq;
|
||||||
pci_write_config8(prev->dev, prev->pos + prev->freq_off, freq);
|
pci_write_config8(prev->dev, prev->pos + prev->freq_off, freq);
|
||||||
reset_needed = 1;
|
reset_needed = 1;
|
||||||
printk(BIOS_SPEW, "HyperT freqU old %x new %x\n", old_freq, freq);
|
printk(BIOS_SPEW, "HyperT freqU old %x new %x\n",
|
||||||
new_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
|
old_freq, freq);
|
||||||
|
new_freq =
|
||||||
|
pci_read_config8(prev->dev, prev->pos + prev->freq_off);
|
||||||
new_freq &= 0x0f;
|
new_freq &= 0x0f;
|
||||||
if (new_freq != freq) {
|
if (new_freq != freq) {
|
||||||
printk(BIOS_ERR, "%s Hypertransport frequency would not set wanted: %x got: %x\n",
|
printk(BIOS_ERR, "%s Hypertransport frequency would "
|
||||||
|
"not set. Wanted: %x, got: %x\n",
|
||||||
dev_path(prev->dev), freq, new_freq);
|
dev_path(prev->dev), freq, new_freq);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
old_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
|
old_width =
|
||||||
|
pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
|
||||||
if (upstream_width != old_width) {
|
if (upstream_width != old_width) {
|
||||||
unsigned new_width;
|
unsigned new_width;
|
||||||
pci_write_config8(prev->dev, prev->pos + prev->config_off + 1, upstream_width);
|
pci_write_config8(prev->dev, prev->pos + prev->config_off + 1,
|
||||||
|
upstream_width);
|
||||||
reset_needed = 1;
|
reset_needed = 1;
|
||||||
printk(BIOS_SPEW, "HyperT widthU old %x new %x\n", old_width, upstream_width);
|
printk(BIOS_SPEW, "HyperT widthU old %x new %x\n", old_width,
|
||||||
new_width = pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
|
upstream_width);
|
||||||
|
new_width = pci_read_config8(prev->dev,
|
||||||
|
prev->pos + prev->config_off + 1);
|
||||||
if (new_width != upstream_width) {
|
if (new_width != upstream_width) {
|
||||||
printk(BIOS_ERR, "%s Hypertransport width would not set wanted: %x got: %x\n",
|
printk(BIOS_ERR, "%s Hypertransport width would not "
|
||||||
|
"set. Wanted: %x, got: %x\n",
|
||||||
dev_path(prev->dev), upstream_width, new_width);
|
dev_path(prev->dev), upstream_width, new_width);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Remember the current link as the previous link,
|
/*
|
||||||
* But look at the other offsets.
|
* Remember the current link as the previous link, but look at the
|
||||||
|
* other offsets.
|
||||||
*/
|
*/
|
||||||
prev->dev = cur->dev;
|
prev->dev = cur->dev;
|
||||||
prev->pos = cur->pos;
|
prev->pos = cur->pos;
|
||||||
|
@ -263,29 +289,32 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
|
||||||
static unsigned ht_lookup_slave_capability(struct device *dev)
|
static unsigned ht_lookup_slave_capability(struct device *dev)
|
||||||
{
|
{
|
||||||
unsigned pos;
|
unsigned pos;
|
||||||
|
|
||||||
pos = 0;
|
pos = 0;
|
||||||
do {
|
do {
|
||||||
pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos);
|
pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos);
|
||||||
if (pos) {
|
if (pos) {
|
||||||
unsigned flags;
|
u16 flags;
|
||||||
flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
|
flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
|
||||||
printk(BIOS_SPEW, "flags: 0x%04x\n", flags);
|
printk(BIOS_SPEW, "flags: 0x%04x\n", flags);
|
||||||
if ((flags >> 13) == 0) {
|
if ((flags >> 13) == 0) {
|
||||||
/* Entry is a Slave secondary, success... */
|
/* Entry is a slave secondary, success... */
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
} while (pos);
|
} while (pos);
|
||||||
|
|
||||||
return pos;
|
return pos;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ht_collapse_early_enumeration(struct bus *bus, unsigned offset_unitid)
|
static void ht_collapse_early_enumeration(struct bus *bus,
|
||||||
|
unsigned offset_unitid)
|
||||||
{
|
{
|
||||||
unsigned int devfn;
|
unsigned int devfn;
|
||||||
struct ht_link prev;
|
struct ht_link prev;
|
||||||
unsigned ctrl;
|
u16 ctrl;
|
||||||
|
|
||||||
/* Initialize the hypertransport enumeration state */
|
/* Initialize the hypertransport enumeration state. */
|
||||||
prev.dev = bus->dev;
|
prev.dev = bus->dev;
|
||||||
prev.pos = bus->cap;
|
prev.pos = bus->cap;
|
||||||
prev.ctrl_off = PCI_HT_CAP_HOST_CTRL;
|
prev.ctrl_off = PCI_HT_CAP_HOST_CTRL;
|
||||||
|
@ -293,77 +322,85 @@ static void ht_collapse_early_enumeration(struct bus *bus, unsigned offset_uniti
|
||||||
prev.freq_off = PCI_HT_CAP_HOST_FREQ;
|
prev.freq_off = PCI_HT_CAP_HOST_FREQ;
|
||||||
prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
|
prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
|
||||||
|
|
||||||
/* Wait until the link initialization is complete */
|
/* Wait until the link initialization is complete. */
|
||||||
do {
|
do {
|
||||||
ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
|
ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
|
||||||
/* Is this the end of the hypertransport chain */
|
|
||||||
if (ctrl & (1 << 6)) {
|
/* Is this the end of the hypertransport chain? */
|
||||||
|
if (ctrl & (1 << 6))
|
||||||
return;
|
return;
|
||||||
}
|
|
||||||
/* Has the link failed? */
|
/* Has the link failed? */
|
||||||
if (ctrl & (1 << 4)) {
|
if (ctrl & (1 << 4)) {
|
||||||
/*
|
/*
|
||||||
* Either the link has failed, or we have
|
* Either the link has failed, or we have a CRC error.
|
||||||
* a CRC error.
|
* Sometimes this can happen due to link retrain, so
|
||||||
* Sometimes this can happen due to link
|
* lets knock it down and see if its transient.
|
||||||
* retrain, so lets knock it down and see
|
|
||||||
* if its transient
|
|
||||||
*/
|
*/
|
||||||
ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc
|
ctrl |= ((1 << 4) | (1 << 8)); /* Link fail + CRC */
|
||||||
pci_write_config16(prev.dev, prev.pos + prev.ctrl_off, ctrl);
|
pci_write_config16(prev.dev, prev.pos + prev.ctrl_off,
|
||||||
ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
|
ctrl);
|
||||||
|
ctrl = pci_read_config16(prev.dev,
|
||||||
|
prev.pos + prev.ctrl_off);
|
||||||
if (ctrl & ((1 << 4) | (1 << 8))) {
|
if (ctrl & ((1 << 4) | (1 << 8))) {
|
||||||
printk(BIOS_ALERT, "Detected error on Hypertransport Link\n");
|
printk(BIOS_ALERT, "Detected error on "
|
||||||
|
"Hypertransport link\n");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
} while ((ctrl & (1 << 5)) == 0);
|
} while ((ctrl & (1 << 5)) == 0);
|
||||||
|
|
||||||
//actually, only for one HT device HT chain, and unitid is 0
|
/* Actually, only for one HT device HT chain, and unitid is 0. */
|
||||||
#if CONFIG_HT_CHAIN_UNITID_BASE == 0
|
#if CONFIG_HT_CHAIN_UNITID_BASE == 0
|
||||||
if(offset_unitid) {
|
if (offset_unitid)
|
||||||
return;
|
return;
|
||||||
}
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Check if is already collapsed */
|
/* Check if is already collapsed. */
|
||||||
if((!offset_unitid)|| (offset_unitid && (!((CONFIG_HT_CHAIN_END_UNITID_BASE == 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE <CONFIG_HT_CHAIN_UNITID_BASE))))) {
|
if ((!offset_unitid) || (offset_unitid
|
||||||
|
&& (!((CONFIG_HT_CHAIN_END_UNITID_BASE == 0)
|
||||||
|
&& (CONFIG_HT_CHAIN_END_UNITID_BASE
|
||||||
|
< CONFIG_HT_CHAIN_UNITID_BASE))))) {
|
||||||
|
|
||||||
struct device dummy;
|
struct device dummy;
|
||||||
uint32_t id;
|
u32 id;
|
||||||
|
|
||||||
dummy.bus = bus;
|
dummy.bus = bus;
|
||||||
dummy.path.type = DEVICE_PATH_PCI;
|
dummy.path.type = DEVICE_PATH_PCI;
|
||||||
dummy.path.pci.devfn = PCI_DEVFN(0, 0);
|
dummy.path.pci.devfn = PCI_DEVFN(0, 0);
|
||||||
|
|
||||||
id = pci_read_config32(&dummy, PCI_VENDOR_ID);
|
id = pci_read_config32(&dummy, PCI_VENDOR_ID);
|
||||||
if ( ! ( (id == 0xffffffff) || (id == 0x00000000) ||
|
if (!((id == 0xffffffff) || (id == 0x00000000)
|
||||||
(id == 0x0000ffff) || (id == 0xffff0000) ) ) {
|
|| (id == 0x0000ffff) || (id == 0xffff0000))) {
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Spin through the devices and collapse any early
|
/* Spin through the devices and collapse any early HT enumeration. */
|
||||||
* hypertransport enumeration.
|
|
||||||
*/
|
|
||||||
for (devfn = PCI_DEVFN(1, 0); devfn <= 0xff; devfn += 8) {
|
for (devfn = PCI_DEVFN(1, 0); devfn <= 0xff; devfn += 8) {
|
||||||
struct device dummy;
|
struct device dummy;
|
||||||
uint32_t id;
|
u32 id;
|
||||||
unsigned pos, flags;
|
unsigned pos, flags;
|
||||||
|
|
||||||
dummy.bus = bus;
|
dummy.bus = bus;
|
||||||
dummy.path.type = DEVICE_PATH_PCI;
|
dummy.path.type = DEVICE_PATH_PCI;
|
||||||
dummy.path.pci.devfn = devfn;
|
dummy.path.pci.devfn = devfn;
|
||||||
|
|
||||||
id = pci_read_config32(&dummy, PCI_VENDOR_ID);
|
id = pci_read_config32(&dummy, PCI_VENDOR_ID);
|
||||||
if ( (id == 0xffffffff) || (id == 0x00000000) ||
|
if ((id == 0xffffffff) || (id == 0x00000000)
|
||||||
(id == 0x0000ffff) || (id == 0xffff0000)) {
|
|| (id == 0x0000ffff) || (id == 0xffff0000)) {
|
||||||
continue;
|
|
||||||
}
|
|
||||||
dummy.vendor = id & 0xffff;
|
|
||||||
dummy.device = (id >> 16) & 0xffff;
|
|
||||||
dummy.hdr_type = pci_read_config8(&dummy, PCI_HEADER_TYPE);
|
|
||||||
pos = ht_lookup_slave_capability(&dummy);
|
|
||||||
if (!pos){
|
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Clear the unitid */
|
dummy.vendor = id & 0xffff;
|
||||||
|
dummy.device = (id >> 16) & 0xffff;
|
||||||
|
dummy.hdr_type = pci_read_config8(&dummy, PCI_HEADER_TYPE);
|
||||||
|
|
||||||
|
pos = ht_lookup_slave_capability(&dummy);
|
||||||
|
if (!pos)
|
||||||
|
continue;
|
||||||
|
|
||||||
|
/* Clear the unitid. */
|
||||||
flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
|
flags = pci_read_config16(&dummy, pos + PCI_CAP_FLAGS);
|
||||||
flags &= ~0x1f;
|
flags &= ~0x1f;
|
||||||
pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
|
pci_write_config16(&dummy, pos + PCI_CAP_FLAGS, flags);
|
||||||
|
@ -372,129 +409,139 @@ static void ht_collapse_early_enumeration(struct bus *bus, unsigned offset_uniti
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
unsigned int hypertransport_scan_chain(struct bus *bus,
|
unsigned int hypertransport_scan_chain(struct bus *bus, unsigned min_devfn,
|
||||||
unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unitid_base, unsigned offset_unitid)
|
unsigned max_devfn, unsigned int max,
|
||||||
|
unsigned *ht_unitid_base,
|
||||||
|
unsigned offset_unitid)
|
||||||
{
|
{
|
||||||
//even CONFIG_HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link
|
/*
|
||||||
unsigned next_unitid, last_unitid;
|
* Even CONFIG_HT_CHAIN_UNITID_BASE == 0, we still can go through this
|
||||||
device_t old_devices, dev, func;
|
* function, because of end_of_chain check. Also, we need it to
|
||||||
unsigned min_unitid = (offset_unitid) ? CONFIG_HT_CHAIN_UNITID_BASE:1;
|
* optimize link.
|
||||||
|
*/
|
||||||
|
unsigned int next_unitid, last_unitid, min_unitid, max_unitid;
|
||||||
|
device_t old_devices, dev, func, last_func = 0;
|
||||||
struct ht_link prev;
|
struct ht_link prev;
|
||||||
device_t last_func = 0;
|
|
||||||
int ht_dev_num = 0;
|
int ht_dev_num = 0;
|
||||||
unsigned max_unitid;
|
|
||||||
|
min_unitid = (offset_unitid) ? CONFIG_HT_CHAIN_UNITID_BASE : 1;
|
||||||
|
|
||||||
#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
|
#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
|
||||||
//let't record the device of last ht device, So we can set the Unitid to CONFIG_HT_CHAIN_END_UNITID_BASE
|
/*
|
||||||
unsigned real_last_unitid=0;
|
* Let's record the device of last HT device, so we can set the unitid
|
||||||
uint8_t real_last_pos=0;
|
* to CONFIG_HT_CHAIN_END_UNITID_BASE.
|
||||||
|
*/
|
||||||
|
unsigned int real_last_unitid = 0, end_used = 0;
|
||||||
|
u8 real_last_pos = 0;
|
||||||
device_t real_last_dev = NULL;
|
device_t real_last_dev = NULL;
|
||||||
unsigned end_used = 0;
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Restore the hypertransport chain to it's unitialized state */
|
/* Restore the hypertransport chain to it's unitialized state. */
|
||||||
ht_collapse_early_enumeration(bus, offset_unitid);
|
ht_collapse_early_enumeration(bus, offset_unitid);
|
||||||
|
|
||||||
/* See which static device nodes I have */
|
/* See which static device nodes I have. */
|
||||||
old_devices = bus->children;
|
old_devices = bus->children;
|
||||||
bus->children = 0;
|
bus->children = 0;
|
||||||
|
|
||||||
/* Initialize the hypertransport enumeration state */
|
/* Initialize the hypertransport enumeration state. */
|
||||||
prev.dev = bus->dev;
|
prev.dev = bus->dev;
|
||||||
prev.pos = bus->cap;
|
prev.pos = bus->cap;
|
||||||
|
|
||||||
prev.ctrl_off = PCI_HT_CAP_HOST_CTRL;
|
prev.ctrl_off = PCI_HT_CAP_HOST_CTRL;
|
||||||
prev.config_off = PCI_HT_CAP_HOST_WIDTH;
|
prev.config_off = PCI_HT_CAP_HOST_WIDTH;
|
||||||
prev.freq_off = PCI_HT_CAP_HOST_FREQ;
|
prev.freq_off = PCI_HT_CAP_HOST_FREQ;
|
||||||
prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
|
prev.freq_cap_off = PCI_HT_CAP_HOST_FREQ_CAP;
|
||||||
|
|
||||||
/* If present assign unitid to a hypertransport chain */
|
/* If present, assign unitid to a hypertransport chain. */
|
||||||
last_unitid = min_unitid -1;
|
last_unitid = min_unitid -1;
|
||||||
max_unitid = next_unitid = min_unitid;
|
max_unitid = next_unitid = min_unitid;
|
||||||
do {
|
do {
|
||||||
uint8_t pos;
|
u8 pos;
|
||||||
uint16_t flags;
|
u16 flags, ctrl;
|
||||||
unsigned count, static_count;
|
unsigned int count, static_count;
|
||||||
unsigned ctrl;
|
|
||||||
|
|
||||||
last_unitid = next_unitid;
|
last_unitid = next_unitid;
|
||||||
|
|
||||||
/* Wait until the link initialization is complete */
|
/* Wait until the link initialization is complete. */
|
||||||
do {
|
do {
|
||||||
ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
|
ctrl = pci_read_config16(prev.dev,
|
||||||
|
prev.pos + prev.ctrl_off);
|
||||||
|
|
||||||
|
/* End of chain? */
|
||||||
if (ctrl & (1 << 6))
|
if (ctrl & (1 << 6))
|
||||||
goto end_of_chain; // End of chain
|
goto end_of_chain;
|
||||||
|
|
||||||
if (ctrl & ((1 << 4) | (1 << 8))) {
|
if (ctrl & ((1 << 4) | (1 << 8))) {
|
||||||
/*
|
/*
|
||||||
* Either the link has failed, or we have
|
* Either the link has failed, or we have a CRC
|
||||||
* a CRC error.
|
* error. Sometimes this can happen due to link
|
||||||
* Sometimes this can happen due to link
|
* retrain, so lets knock it down and see if
|
||||||
* retrain, so lets knock it down and see
|
* it's transient.
|
||||||
* if its transient
|
|
||||||
*/
|
*/
|
||||||
ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc
|
ctrl |= ((1 << 4) | (1 <<8)); // Link fail + CRC
|
||||||
pci_write_config16(prev.dev, prev.pos + prev.ctrl_off, ctrl);
|
pci_write_config16(prev.dev,
|
||||||
ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
|
prev.pos + prev.ctrl_off, ctrl);
|
||||||
|
ctrl = pci_read_config16(prev.dev,
|
||||||
|
prev.pos + prev.ctrl_off);
|
||||||
if (ctrl & ((1 << 4) | (1 << 8))) {
|
if (ctrl & ((1 << 4) | (1 << 8))) {
|
||||||
printk(BIOS_ALERT, "Detected error on Hypertransport Link\n");
|
printk(BIOS_ALERT, "Detected error on "
|
||||||
|
"hypertransport link\n");
|
||||||
goto end_of_chain;
|
goto end_of_chain;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
} while ((ctrl & (1 << 5)) == 0);
|
} while ((ctrl & (1 << 5)) == 0);
|
||||||
|
|
||||||
|
|
||||||
/* Get and setup the device_structure */
|
/* Get and setup the device_structure. */
|
||||||
dev = ht_scan_get_devs(&old_devices);
|
dev = ht_scan_get_devs(&old_devices);
|
||||||
|
|
||||||
/* See if a device is present and setup the
|
/* See if a device is present and setup the device structure. */
|
||||||
* device structure.
|
|
||||||
*/
|
|
||||||
dev = pci_probe_dev(dev, bus, 0);
|
dev = pci_probe_dev(dev, bus, 0);
|
||||||
if (!dev || !dev->enabled) {
|
if (!dev || !dev->enabled)
|
||||||
break;
|
break;
|
||||||
}
|
|
||||||
|
|
||||||
/* Find the hypertransport link capability */
|
/* Find the hypertransport link capability. */
|
||||||
pos = ht_lookup_slave_capability(dev);
|
pos = ht_lookup_slave_capability(dev);
|
||||||
if (pos == 0) {
|
if (pos == 0) {
|
||||||
printk(BIOS_ERR, "%s Hypertransport link capability not found",
|
printk(BIOS_ERR, "%s Hypertransport link capability "
|
||||||
dev_path(dev));
|
"not found", dev_path(dev));
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Update the Unitid of the current device */
|
/* Update the unitid of the current device. */
|
||||||
flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
|
flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
|
||||||
|
|
||||||
/* If the devices has a unitid set and is at devfn 0 we are done.
|
/*
|
||||||
* This can happen with shadow hypertransport devices,
|
* If the devices has a unitid set and is at devfn 0 we are
|
||||||
* or if we have reached the bottom of a
|
* done. This can happen with shadow hypertransport devices,
|
||||||
* hypertransport device chain.
|
* or if we have reached the bottom of a HT device chain.
|
||||||
*/
|
*/
|
||||||
if (flags & 0x1f) {
|
if (flags & 0x1f)
|
||||||
break;
|
break;
|
||||||
}
|
|
||||||
flags &= ~0x1f; /* mask out base Unit ID */
|
|
||||||
|
|
||||||
count = (flags >> 5) & 0x1f; /* get unit count */
|
flags &= ~0x1f; /* Mask out base Unit ID. */
|
||||||
|
|
||||||
|
count = (flags >> 5) & 0x1f; /* Het unit count. */
|
||||||
|
|
||||||
#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
|
#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
|
||||||
if (offset_unitid) {
|
if (offset_unitid) {
|
||||||
if(next_unitid > (max_devfn>>3)) { // max_devfn will be (0x17<<3)|7 or (0x1f<<3)|7
|
/* max_devfn will be (0x17<<3)|7 or (0x1f<<3)|7. */
|
||||||
|
if (next_unitid > (max_devfn >> 3)) {
|
||||||
if (!end_used) {
|
if (!end_used) {
|
||||||
next_unitid = CONFIG_HT_CHAIN_END_UNITID_BASE;
|
next_unitid =
|
||||||
|
CONFIG_HT_CHAIN_END_UNITID_BASE;
|
||||||
end_used = 1;
|
end_used = 1;
|
||||||
} else {
|
} else {
|
||||||
goto end_of_chain;
|
goto end_of_chain;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
flags |= next_unitid & 0x1f;
|
flags |= next_unitid & 0x1f;
|
||||||
pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
|
pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
|
||||||
|
|
||||||
/* Update the Unitd id in the device structure */
|
/* Update the unitid in the device structure. */
|
||||||
static_count = 1;
|
static_count = 1;
|
||||||
for (func = dev; func; func = func->sibling) {
|
for (func = dev; func; func = func->sibling) {
|
||||||
func->path.pci.devfn += (next_unitid << 3);
|
func->path.pci.devfn += (next_unitid << 3);
|
||||||
|
@ -502,14 +549,14 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
|
||||||
- (dev->path.pci.devfn >> 3) + 1;
|
- (dev->path.pci.devfn >> 3) + 1;
|
||||||
last_func = func;
|
last_func = func;
|
||||||
}
|
}
|
||||||
/* Compute the number of unitids consumed */
|
|
||||||
|
/* Compute the number of unitids consumed. */
|
||||||
printk(BIOS_SPEW, "%s count: %04x static_count: %04x\n",
|
printk(BIOS_SPEW, "%s count: %04x static_count: %04x\n",
|
||||||
dev_path(dev), count, static_count);
|
dev_path(dev), count, static_count);
|
||||||
if (count < static_count) {
|
if (count < static_count)
|
||||||
count = static_count;
|
count = static_count;
|
||||||
}
|
|
||||||
|
|
||||||
/* Update the Unitid of the next device */
|
/* Update the unitid of the next device. */
|
||||||
ht_unitid_base[ht_dev_num] = next_unitid;
|
ht_unitid_base[ht_dev_num] = next_unitid;
|
||||||
ht_dev_num++;
|
ht_dev_num++;
|
||||||
|
|
||||||
|
@ -521,74 +568,81 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
next_unitid += count;
|
next_unitid += count;
|
||||||
if (next_unitid > max_unitid) {
|
if (next_unitid > max_unitid)
|
||||||
max_unitid = next_unitid;
|
max_unitid = next_unitid;
|
||||||
}
|
|
||||||
|
|
||||||
/* Setup the hypetransport link */
|
/* Setup the hypetransport link. */
|
||||||
bus->reset_needed |= ht_setup_link(&prev, dev, pos);
|
bus->reset_needed |= ht_setup_link(&prev, dev, pos);
|
||||||
|
|
||||||
printk(BIOS_DEBUG, "%s [%04x/%04x] %s next_unitid: %04x\n",
|
printk(BIOS_DEBUG, "%s [%04x/%04x] %s next_unitid: %04x\n",
|
||||||
dev_path(dev),
|
dev_path(dev), dev->vendor, dev->device,
|
||||||
dev->vendor, dev->device,
|
|
||||||
(dev->enabled? "enabled" : "disabled"), next_unitid);
|
(dev->enabled? "enabled" : "disabled"), next_unitid);
|
||||||
|
|
||||||
} while (last_unitid != next_unitid);
|
} while (last_unitid != next_unitid);
|
||||||
|
|
||||||
end_of_chain:
|
end_of_chain:
|
||||||
|
|
||||||
#if OPT_HT_LINK == 1
|
#if OPT_HT_LINK == 1
|
||||||
if(bus->reset_needed) {
|
if (bus->reset_needed)
|
||||||
printk(BIOS_INFO, "HyperT reset needed\n");
|
printk(BIOS_INFO, "HyperT reset needed\n");
|
||||||
}
|
else
|
||||||
else {
|
|
||||||
printk(BIOS_DEBUG, "HyperT reset not needed\n");
|
printk(BIOS_DEBUG, "HyperT reset not needed\n");
|
||||||
}
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
|
#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
|
||||||
if(offset_unitid && (ht_dev_num>1) && (real_last_unitid != CONFIG_HT_CHAIN_END_UNITID_BASE) && !end_used) {
|
if (offset_unitid && (ht_dev_num > 1)
|
||||||
uint16_t flags;
|
&& (real_last_unitid != CONFIG_HT_CHAIN_END_UNITID_BASE)
|
||||||
flags = pci_read_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS);
|
&& !end_used) {
|
||||||
|
u16 flags;
|
||||||
|
flags = pci_read_config16(real_last_dev,
|
||||||
|
real_last_pos + PCI_CAP_FLAGS);
|
||||||
flags &= ~0x1f;
|
flags &= ~0x1f;
|
||||||
flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & 0x1f;
|
flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & 0x1f;
|
||||||
pci_write_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS, flags);
|
pci_write_config16(real_last_dev,
|
||||||
|
real_last_pos + PCI_CAP_FLAGS, flags);
|
||||||
|
|
||||||
for (func = real_last_dev; func; func = func->sibling) {
|
for (func = real_last_dev; func; func = func->sibling) {
|
||||||
func->path.pci.devfn -= ((real_last_unitid - CONFIG_HT_CHAIN_END_UNITID_BASE) << 3);
|
func->path.pci.devfn -= ((real_last_unitid
|
||||||
|
- CONFIG_HT_CHAIN_END_UNITID_BASE) << 3);
|
||||||
last_func = func;
|
last_func = func;
|
||||||
}
|
}
|
||||||
|
|
||||||
ht_unitid_base[ht_dev_num-1] = CONFIG_HT_CHAIN_END_UNITID_BASE; // update last one
|
/* Update last one. */
|
||||||
|
ht_unitid_base[ht_dev_num-1] = CONFIG_HT_CHAIN_END_UNITID_BASE;
|
||||||
|
|
||||||
printk(BIOS_DEBUG, " unitid: %04x --> %04x\n",
|
printk(BIOS_DEBUG, " unitid: %04x --> %04x\n",
|
||||||
real_last_unitid, CONFIG_HT_CHAIN_END_UNITID_BASE);
|
real_last_unitid, CONFIG_HT_CHAIN_END_UNITID_BASE);
|
||||||
|
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
next_unitid = max_unitid;
|
next_unitid = max_unitid;
|
||||||
|
|
||||||
if (next_unitid > 0x20) {
|
if (next_unitid > 0x20)
|
||||||
next_unitid = 0x20;
|
next_unitid = 0x20;
|
||||||
}
|
|
||||||
if( (bus->secondary == 0) && (next_unitid > 0x18)) {
|
|
||||||
next_unitid = 0x18; /* avoid K8 on bus 0 */
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Die if any leftover Static devices are are found.
|
if ((bus->secondary == 0) && (next_unitid > 0x18))
|
||||||
* There's probably a problem in the Config.lb.
|
next_unitid = 0x18; /* Avoid K8 on bus 0. */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Die if any leftover static devices are are found. There's probably
|
||||||
|
* a problem in devicetree.cb.
|
||||||
*/
|
*/
|
||||||
if (old_devices) {
|
if (old_devices) {
|
||||||
device_t left;
|
device_t left;
|
||||||
for(left = old_devices; left; left = left->sibling) {
|
for (left = old_devices; left; left = left->sibling)
|
||||||
printk(BIOS_DEBUG, "%s\n", dev_path(left));
|
printk(BIOS_DEBUG, "%s\n", dev_path(left));
|
||||||
}
|
|
||||||
printk(BIOS_ERR, "HT: Left over static devices. Check your Config.lb\n");
|
printk(BIOS_ERR, "HT: Leftover static devices. "
|
||||||
if(last_func && !last_func->sibling) // put back the left over static device, and let pci_scan_bus disable it
|
"Check your devicetree.cb\n");
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Put back the leftover static device, and let pci_scan_bus()
|
||||||
|
* disable it.
|
||||||
|
*/
|
||||||
|
if (last_func && !last_func->sibling)
|
||||||
last_func->sibling = old_devices;
|
last_func->sibling = old_devices;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Now that nothing is overlapping it is safe to scan the
|
/* Now that nothing is overlapping it is safe to scan the children. */
|
||||||
* children.
|
|
||||||
*/
|
|
||||||
max = pci_scan_bus(bus, 0x00, ((next_unitid - 1) << 3) | 7, max);
|
max = pci_scan_bus(bus, 0x00, ((next_unitid - 1) << 3) | 7, max);
|
||||||
return max;
|
return max;
|
||||||
}
|
}
|
||||||
|
@ -608,11 +662,12 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
|
||||||
* @return The maximum bus number found, after scanning all subordinate busses.
|
* @return The maximum bus number found, after scanning all subordinate busses.
|
||||||
*/
|
*/
|
||||||
static unsigned int hypertransport_scan_chain_x(struct bus *bus,
|
static unsigned int hypertransport_scan_chain_x(struct bus *bus,
|
||||||
unsigned min_devfn, unsigned max_devfn, unsigned int max)
|
unsigned int min_devfn, unsigned int max_devfn, unsigned int max)
|
||||||
{
|
{
|
||||||
unsigned ht_unitid_base[4];
|
unsigned int ht_unitid_base[4];
|
||||||
unsigned offset_unitid = 1;
|
unsigned int offset_unitid = 1;
|
||||||
return hypertransport_scan_chain(bus, min_devfn, max_devfn, max, ht_unitid_base, offset_unitid);
|
return hypertransport_scan_chain(bus, min_devfn, max_devfn, max,
|
||||||
|
ht_unitid_base, offset_unitid);
|
||||||
}
|
}
|
||||||
|
|
||||||
unsigned int ht_scan_bridge(struct device *dev, unsigned int max)
|
unsigned int ht_scan_bridge(struct device *dev, unsigned int max)
|
||||||
|
|
|
@ -56,6 +56,7 @@
|
||||||
u8 pci_moving_config8(struct device *dev, unsigned int reg)
|
u8 pci_moving_config8(struct device *dev, unsigned int reg)
|
||||||
{
|
{
|
||||||
u8 value, ones, zeroes;
|
u8 value, ones, zeroes;
|
||||||
|
|
||||||
value = pci_read_config8(dev, reg);
|
value = pci_read_config8(dev, reg);
|
||||||
|
|
||||||
pci_write_config8(dev, reg, 0xff);
|
pci_write_config8(dev, reg, 0xff);
|
||||||
|
@ -72,6 +73,7 @@ u8 pci_moving_config8(struct device *dev, unsigned int reg)
|
||||||
u16 pci_moving_config16(struct device *dev, unsigned int reg)
|
u16 pci_moving_config16(struct device *dev, unsigned int reg)
|
||||||
{
|
{
|
||||||
u16 value, ones, zeroes;
|
u16 value, ones, zeroes;
|
||||||
|
|
||||||
value = pci_read_config16(dev, reg);
|
value = pci_read_config16(dev, reg);
|
||||||
|
|
||||||
pci_write_config16(dev, reg, 0xffff);
|
pci_write_config16(dev, reg, 0xffff);
|
||||||
|
@ -88,6 +90,7 @@ u16 pci_moving_config16(struct device * dev, unsigned int reg)
|
||||||
u32 pci_moving_config32(struct device *dev, unsigned int reg)
|
u32 pci_moving_config32(struct device *dev, unsigned int reg)
|
||||||
{
|
{
|
||||||
u32 value, ones, zeroes;
|
u32 value, ones, zeroes;
|
||||||
|
|
||||||
value = pci_read_config32(dev, reg);
|
value = pci_read_config32(dev, reg);
|
||||||
|
|
||||||
pci_write_config32(dev, reg, 0xffffffff);
|
pci_write_config32(dev, reg, 0xffffffff);
|
||||||
|
@ -114,13 +117,13 @@ unsigned pci_find_next_capability(struct device *dev, unsigned cap,
|
||||||
unsigned last)
|
unsigned last)
|
||||||
{
|
{
|
||||||
unsigned pos = 0;
|
unsigned pos = 0;
|
||||||
unsigned status;
|
u16 status;
|
||||||
unsigned reps = 48;
|
unsigned reps = 48;
|
||||||
|
|
||||||
status = pci_read_config16(dev, PCI_STATUS);
|
status = pci_read_config16(dev, PCI_STATUS);
|
||||||
if (!(status & PCI_STATUS_CAP_LIST)) {
|
if (!(status & PCI_STATUS_CAP_LIST))
|
||||||
return 0;
|
return 0;
|
||||||
}
|
|
||||||
switch (dev->hdr_type & 0x7f) {
|
switch (dev->hdr_type & 0x7f) {
|
||||||
case PCI_HEADER_TYPE_NORMAL:
|
case PCI_HEADER_TYPE_NORMAL:
|
||||||
case PCI_HEADER_TYPE_BRIDGE:
|
case PCI_HEADER_TYPE_BRIDGE:
|
||||||
|
@ -132,22 +135,24 @@ unsigned pci_find_next_capability(struct device *dev, unsigned cap,
|
||||||
default:
|
default:
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
pos = pci_read_config8(dev, pos);
|
pos = pci_read_config8(dev, pos);
|
||||||
while (reps-- && (pos >= 0x40)) { /* Loop through the linked list. */
|
while (reps-- && (pos >= 0x40)) { /* Loop through the linked list. */
|
||||||
int this_cap;
|
int this_cap;
|
||||||
|
|
||||||
pos &= ~3;
|
pos &= ~3;
|
||||||
this_cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID);
|
this_cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID);
|
||||||
printk(BIOS_SPEW, "Capability: type 0x%02x @ 0x%02x\n", this_cap,
|
printk(BIOS_SPEW, "Capability: type 0x%02x @ 0x%02x\n",
|
||||||
pos);
|
this_cap, pos);
|
||||||
if (this_cap == 0xff) {
|
if (this_cap == 0xff)
|
||||||
break;
|
break;
|
||||||
}
|
|
||||||
if (!last && (this_cap == cap)) {
|
if (!last && (this_cap == cap))
|
||||||
return pos;
|
return pos;
|
||||||
}
|
|
||||||
if (last == pos) {
|
if (last == pos)
|
||||||
last = 0;
|
last = 0;
|
||||||
}
|
|
||||||
pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT);
|
pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT);
|
||||||
}
|
}
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -199,6 +204,7 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
|
||||||
moving |=
|
moving |=
|
||||||
((resource_t) pci_moving_config32(dev, index + 4)) << 32;
|
((resource_t) pci_moving_config32(dev, index + 4)) << 32;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Find the resource constraints.
|
/* Find the resource constraints.
|
||||||
* Start by finding the bits that move. From there:
|
* Start by finding the bits that move. From there:
|
||||||
* - Size is the least significant bit of the bits that move.
|
* - Size is the least significant bit of the bits that move.
|
||||||
|
@ -217,19 +223,24 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
|
||||||
resource->limit = limit = moving | (resource->size - 1);
|
resource->limit = limit = moving | (resource->size - 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Some broken hardware has read-only registers that do not
|
/*
|
||||||
|
* Some broken hardware has read-only registers that do not
|
||||||
* really size correctly.
|
* really size correctly.
|
||||||
* Example: the Acer M7229 has BARs 1-4 normally read-only.
|
*
|
||||||
|
* Example: the Acer M7229 has BARs 1-4 normally read-only,
|
||||||
* so BAR1 at offset 0x10 reads 0x1f1. If you size that register
|
* so BAR1 at offset 0x10 reads 0x1f1. If you size that register
|
||||||
* by writing 0xffffffff to it, it will read back as 0x1f1 -- a
|
* by writing 0xffffffff to it, it will read back as 0x1f1 -- which
|
||||||
* violation of the spec.
|
* is a violation of the spec.
|
||||||
* We catch this case and ignore it by observing which bits move,
|
*
|
||||||
* This also catches the common case unimplemented registers
|
* We catch this case and ignore it by observing which bits move.
|
||||||
|
*
|
||||||
|
* This also catches the common case of unimplemented registers
|
||||||
* that always read back as 0.
|
* that always read back as 0.
|
||||||
*/
|
*/
|
||||||
if (moving == 0) {
|
if (moving == 0) {
|
||||||
if (value != 0) {
|
if (value != 0) {
|
||||||
printk(BIOS_DEBUG, "%s register %02lx(%08lx), read-only ignoring it\n",
|
printk(BIOS_DEBUG, "%s register %02lx(%08lx), "
|
||||||
|
"read-only ignoring it\n",
|
||||||
dev_path(dev), index, value);
|
dev_path(dev), index, value);
|
||||||
}
|
}
|
||||||
resource->flags = 0;
|
resource->flags = 0;
|
||||||
|
@ -243,9 +254,8 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
|
||||||
/* A Memory mapped base address. */
|
/* A Memory mapped base address. */
|
||||||
attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK;
|
attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK;
|
||||||
resource->flags |= IORESOURCE_MEM;
|
resource->flags |= IORESOURCE_MEM;
|
||||||
if (attr & PCI_BASE_ADDRESS_MEM_PREFETCH) {
|
if (attr & PCI_BASE_ADDRESS_MEM_PREFETCH)
|
||||||
resource->flags |= IORESOURCE_PREFETCH;
|
resource->flags |= IORESOURCE_PREFETCH;
|
||||||
}
|
|
||||||
attr &= PCI_BASE_ADDRESS_MEM_LIMIT_MASK;
|
attr &= PCI_BASE_ADDRESS_MEM_LIMIT_MASK;
|
||||||
if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) {
|
if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) {
|
||||||
/* 32bit limit. */
|
/* 32bit limit. */
|
||||||
|
@ -265,10 +275,10 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
|
||||||
resource->flags = 0;
|
resource->flags = 0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Don't let the limit exceed which bits can move. */
|
/* Don't let the limit exceed which bits can move. */
|
||||||
if (resource->limit > limit) {
|
if (resource->limit > limit)
|
||||||
resource->limit = limit;
|
resource->limit = limit;
|
||||||
}
|
|
||||||
|
|
||||||
return resource;
|
return resource;
|
||||||
}
|
}
|
||||||
|
@ -315,7 +325,8 @@ static void pci_get_rom_resource(struct device *dev, unsigned long index)
|
||||||
resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY;
|
resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY;
|
||||||
} else {
|
} else {
|
||||||
if (value != 0) {
|
if (value != 0) {
|
||||||
printk(BIOS_DEBUG, "%s register %02lx(%08lx), read-only ignoring it\n",
|
printk(BIOS_DEBUG, "%s register %02lx(%08lx), "
|
||||||
|
"read-only ignoring it\n",
|
||||||
dev_path(dev), index, value);
|
dev_path(dev), index, value);
|
||||||
}
|
}
|
||||||
resource->flags = 0;
|
resource->flags = 0;
|
||||||
|
@ -346,12 +357,16 @@ static void pci_read_bases(struct device *dev, unsigned int howmany)
|
||||||
static void pci_record_bridge_resource(struct device *dev, resource_t moving,
|
static void pci_record_bridge_resource(struct device *dev, resource_t moving,
|
||||||
unsigned index, unsigned long type)
|
unsigned index, unsigned long type)
|
||||||
{
|
{
|
||||||
/* Initialize the constraints on the current bus. */
|
|
||||||
struct resource *resource;
|
struct resource *resource;
|
||||||
resource = NULL;
|
|
||||||
if (moving) {
|
|
||||||
unsigned long gran;
|
unsigned long gran;
|
||||||
resource_t step;
|
resource_t step;
|
||||||
|
|
||||||
|
resource = NULL;
|
||||||
|
|
||||||
|
if (!moving)
|
||||||
|
return;
|
||||||
|
|
||||||
|
/* Initialize the constraints on the current bus. */
|
||||||
resource = new_resource(dev, index);
|
resource = new_resource(dev, index);
|
||||||
resource->size = 0;
|
resource->size = 0;
|
||||||
gran = 0;
|
gran = 0;
|
||||||
|
@ -366,8 +381,6 @@ static void pci_record_bridge_resource(struct device *dev, resource_t moving,
|
||||||
resource->flags = type | IORESOURCE_PCI_BRIDGE |
|
resource->flags = type | IORESOURCE_PCI_BRIDGE |
|
||||||
IORESOURCE_BRIDGE;
|
IORESOURCE_BRIDGE;
|
||||||
}
|
}
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void pci_bridge_read_bases(struct device *dev)
|
static void pci_bridge_read_bases(struct device *dev)
|
||||||
{
|
{
|
||||||
|
@ -452,26 +465,23 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
|
||||||
|
|
||||||
/* Make certain the resource has actually been assigned a value. */
|
/* Make certain the resource has actually been assigned a value. */
|
||||||
if (!(resource->flags & IORESOURCE_ASSIGNED)) {
|
if (!(resource->flags & IORESOURCE_ASSIGNED)) {
|
||||||
printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not assigned\n",
|
printk(BIOS_ERR, "ERROR: %s %02lx %s size: 0x%010llx not "
|
||||||
dev_path(dev), resource->index,
|
"assigned\n", dev_path(dev), resource->index,
|
||||||
resource_type(resource), resource->size);
|
resource_type(resource), resource->size);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If this resource is fixed don't worry about it. */
|
/* If this resource is fixed don't worry about it. */
|
||||||
if (resource->flags & IORESOURCE_FIXED) {
|
if (resource->flags & IORESOURCE_FIXED)
|
||||||
return;
|
return;
|
||||||
}
|
|
||||||
|
|
||||||
/* If I have already stored this resource don't worry about it. */
|
/* If I have already stored this resource don't worry about it. */
|
||||||
if (resource->flags & IORESOURCE_STORED) {
|
if (resource->flags & IORESOURCE_STORED)
|
||||||
return;
|
return;
|
||||||
}
|
|
||||||
|
|
||||||
/* If the resource is subtractive don't worry about it. */
|
/* If the resource is subtractive don't worry about it. */
|
||||||
if (resource->flags & IORESOURCE_SUBTRACTIVE) {
|
if (resource->flags & IORESOURCE_SUBTRACTIVE)
|
||||||
return;
|
return;
|
||||||
}
|
|
||||||
|
|
||||||
/* Only handle PCI memory and I/O resources for now. */
|
/* Only handle PCI memory and I/O resources for now. */
|
||||||
if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
|
if (!(resource->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
|
||||||
|
@ -479,16 +489,14 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
|
||||||
|
|
||||||
/* Enable the resources in the command register. */
|
/* Enable the resources in the command register. */
|
||||||
if (resource->size) {
|
if (resource->size) {
|
||||||
if (resource->flags & IORESOURCE_MEM) {
|
if (resource->flags & IORESOURCE_MEM)
|
||||||
dev->command |= PCI_COMMAND_MEMORY;
|
dev->command |= PCI_COMMAND_MEMORY;
|
||||||
}
|
if (resource->flags & IORESOURCE_IO)
|
||||||
if (resource->flags & IORESOURCE_IO) {
|
|
||||||
dev->command |= PCI_COMMAND_IO;
|
dev->command |= PCI_COMMAND_IO;
|
||||||
}
|
if (resource->flags & IORESOURCE_PCI_BRIDGE)
|
||||||
if (resource->flags & IORESOURCE_PCI_BRIDGE) {
|
|
||||||
dev->command |= PCI_COMMAND_MASTER;
|
dev->command |= PCI_COMMAND_MASTER;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
/* Get the base address. */
|
/* Get the base address. */
|
||||||
base = resource->base;
|
base = resource->base;
|
||||||
|
|
||||||
|
@ -498,7 +506,8 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
|
||||||
/* Now store the resource. */
|
/* Now store the resource. */
|
||||||
resource->flags |= IORESOURCE_STORED;
|
resource->flags |= IORESOURCE_STORED;
|
||||||
|
|
||||||
/* PCI Bridges have no enable bit. They are disabled if the base of
|
/*
|
||||||
|
* PCI bridges have no enable bit. They are disabled if the base of
|
||||||
* the range is greater than the limit. If the size is zero, disable
|
* the range is greater than the limit. If the size is zero, disable
|
||||||
* by setting the base = limit and end = limit - 2^gran.
|
* by setting the base = limit and end = limit - 2^gran.
|
||||||
*/
|
*/
|
||||||
|
@ -510,18 +519,18 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
|
||||||
|
|
||||||
if (!(resource->flags & IORESOURCE_PCI_BRIDGE)) {
|
if (!(resource->flags & IORESOURCE_PCI_BRIDGE)) {
|
||||||
unsigned long base_lo, base_hi;
|
unsigned long base_lo, base_hi;
|
||||||
/* Some chipsets allow us to set/clear the I/O bit
|
|
||||||
* (e.g. VIA 82c686a). So set it to be safe.
|
/*
|
||||||
|
* Some chipsets allow us to set/clear the I/O bit
|
||||||
|
* (e.g. VIA 82C686A). So set it to be safe.
|
||||||
*/
|
*/
|
||||||
base_lo = base & 0xffffffff;
|
base_lo = base & 0xffffffff;
|
||||||
base_hi = (base >> 32) & 0xffffffff;
|
base_hi = (base >> 32) & 0xffffffff;
|
||||||
if (resource->flags & IORESOURCE_IO) {
|
if (resource->flags & IORESOURCE_IO)
|
||||||
base_lo |= PCI_BASE_ADDRESS_SPACE_IO;
|
base_lo |= PCI_BASE_ADDRESS_SPACE_IO;
|
||||||
}
|
|
||||||
pci_write_config32(dev, resource->index, base_lo);
|
pci_write_config32(dev, resource->index, base_lo);
|
||||||
if (resource->flags & IORESOURCE_PCI64) {
|
if (resource->flags & IORESOURCE_PCI64)
|
||||||
pci_write_config32(dev, resource->index + 4, base_hi);
|
pci_write_config32(dev, resource->index + 4, base_hi);
|
||||||
}
|
|
||||||
} else if (resource->index == PCI_IO_BASE) {
|
} else if (resource->index == PCI_IO_BASE) {
|
||||||
/* Set the I/O ranges. */
|
/* Set the I/O ranges. */
|
||||||
pci_write_config8(dev, PCI_IO_BASE, base >> 8);
|
pci_write_config8(dev, PCI_IO_BASE, base >> 8);
|
||||||
|
@ -544,8 +553,8 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
|
||||||
printk(BIOS_ERR, "ERROR: invalid resource->index %lx\n",
|
printk(BIOS_ERR, "ERROR: invalid resource->index %lx\n",
|
||||||
resource->index);
|
resource->index);
|
||||||
}
|
}
|
||||||
|
|
||||||
report_resource_stored(dev, resource, "");
|
report_resource_stored(dev, resource, "");
|
||||||
return;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void pci_dev_set_resources(struct device *dev)
|
void pci_dev_set_resources(struct device *dev)
|
||||||
|
@ -554,28 +563,26 @@ void pci_dev_set_resources(struct device *dev)
|
||||||
struct bus *bus;
|
struct bus *bus;
|
||||||
u8 line;
|
u8 line;
|
||||||
|
|
||||||
for (res = dev->resource_list; res; res = res->next) {
|
for (res = dev->resource_list; res; res = res->next)
|
||||||
pci_set_resource(dev, res);
|
pci_set_resource(dev, res);
|
||||||
}
|
|
||||||
for (bus = dev->link_list; bus; bus = bus->next) {
|
for (bus = dev->link_list; bus; bus = bus->next) {
|
||||||
if (bus->children) {
|
if (bus->children)
|
||||||
assign_resources(bus);
|
assign_resources(bus);
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
/* Set a default latency timer. */
|
/* Set a default latency timer. */
|
||||||
pci_write_config8(dev, PCI_LATENCY_TIMER, 0x40);
|
pci_write_config8(dev, PCI_LATENCY_TIMER, 0x40);
|
||||||
|
|
||||||
/* Set a default secondary latency timer. */
|
/* Set a default secondary latency timer. */
|
||||||
if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) {
|
if ((dev->hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE)
|
||||||
pci_write_config8(dev, PCI_SEC_LATENCY_TIMER, 0x40);
|
pci_write_config8(dev, PCI_SEC_LATENCY_TIMER, 0x40);
|
||||||
}
|
|
||||||
|
|
||||||
/* Zero the IRQ settings. */
|
/* Zero the IRQ settings. */
|
||||||
line = pci_read_config8(dev, PCI_INTERRUPT_PIN);
|
line = pci_read_config8(dev, PCI_INTERRUPT_PIN);
|
||||||
if (line) {
|
if (line)
|
||||||
pci_write_config8(dev, PCI_INTERRUPT_LINE, 0);
|
pci_write_config8(dev, PCI_INTERRUPT_LINE, 0);
|
||||||
}
|
|
||||||
/* Set the cache line size, so far 64 bytes is good for everyone. */
|
/* Set the cache line size, so far 64 bytes is good for everyone. */
|
||||||
pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2);
|
pci_write_config8(dev, PCI_CACHE_LINE_SIZE, 64 >> 2);
|
||||||
}
|
}
|
||||||
|
@ -585,11 +592,10 @@ void pci_dev_enable_resources(struct device *dev)
|
||||||
const struct pci_operations *ops;
|
const struct pci_operations *ops;
|
||||||
u16 command;
|
u16 command;
|
||||||
|
|
||||||
/* Set the subsystem vendor and device id for mainboard devices. */
|
/* Set the subsystem vendor and device ID for mainboard devices. */
|
||||||
ops = ops_pci(dev);
|
ops = ops_pci(dev);
|
||||||
if (dev->on_mainboard && ops && ops->set_subsystem) {
|
if (dev->on_mainboard && ops && ops->set_subsystem) {
|
||||||
printk(BIOS_DEBUG, "%s subsystem <- %02x/%02x\n",
|
printk(BIOS_DEBUG, "%s subsystem <- %02x/%02x\n", dev_path(dev),
|
||||||
dev_path(dev),
|
|
||||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
|
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
|
||||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
|
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
|
||||||
ops->set_subsystem(dev,
|
ops->set_subsystem(dev,
|
||||||
|
@ -598,9 +604,11 @@ void pci_dev_enable_resources(struct device *dev)
|
||||||
}
|
}
|
||||||
command = pci_read_config16(dev, PCI_COMMAND);
|
command = pci_read_config16(dev, PCI_COMMAND);
|
||||||
command |= dev->command;
|
command |= dev->command;
|
||||||
|
|
||||||
/* v3 has
|
/* v3 has
|
||||||
* command |= (PCI_COMMAND_PARITY + PCI_COMMAND_SERR); // Error check.
|
* command |= (PCI_COMMAND_PARITY + PCI_COMMAND_SERR); // Error check.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command);
|
printk(BIOS_DEBUG, "%s cmd <- %02x\n", dev_path(dev), command);
|
||||||
pci_write_config16(dev, PCI_COMMAND, command);
|
pci_write_config16(dev, PCI_COMMAND, command);
|
||||||
}
|
}
|
||||||
|
@ -609,7 +617,8 @@ void pci_bus_enable_resources(struct device *dev)
|
||||||
{
|
{
|
||||||
u16 ctrl;
|
u16 ctrl;
|
||||||
|
|
||||||
/* Enable I/O in command register if there is VGA card
|
/*
|
||||||
|
* Enable I/O in command register if there is VGA card
|
||||||
* connected with (even it does not claim I/O resource).
|
* connected with (even it does not claim I/O resource).
|
||||||
*/
|
*/
|
||||||
if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA)
|
if (dev->link_list->bridge_ctrl & PCI_BRIDGE_CTL_VGA)
|
||||||
|
@ -625,11 +634,13 @@ void pci_bus_enable_resources(struct device *dev)
|
||||||
|
|
||||||
void pci_bus_reset(struct bus *bus)
|
void pci_bus_reset(struct bus *bus)
|
||||||
{
|
{
|
||||||
unsigned ctl;
|
u16 ctl;
|
||||||
|
|
||||||
ctl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL);
|
ctl = pci_read_config16(bus->dev, PCI_BRIDGE_CONTROL);
|
||||||
ctl |= PCI_BRIDGE_CTL_BUS_RESET;
|
ctl |= PCI_BRIDGE_CTL_BUS_RESET;
|
||||||
pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl);
|
pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl);
|
||||||
mdelay(10);
|
mdelay(10);
|
||||||
|
|
||||||
ctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
|
ctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
|
||||||
pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl);
|
pci_write_config16(bus->dev, PCI_BRIDGE_CONTROL, ctl);
|
||||||
delay(1);
|
delay(1);
|
||||||
|
@ -641,7 +652,7 @@ void pci_dev_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
|
||||||
((device & 0xffff) << 16) | (vendor & 0xffff));
|
((device & 0xffff) << 16) | (vendor & 0xffff));
|
||||||
}
|
}
|
||||||
|
|
||||||
/** default handler: only runs the relevant pci bios. */
|
/** Default handler: only runs the relevant PCI BIOS. */
|
||||||
void pci_dev_init(struct device *dev)
|
void pci_dev_init(struct device *dev)
|
||||||
{
|
{
|
||||||
#if CONFIG_PCI_ROM_RUN == 1 || CONFIG_VGA_ROM_RUN == 1
|
#if CONFIG_PCI_ROM_RUN == 1 || CONFIG_VGA_ROM_RUN == 1
|
||||||
|
@ -711,15 +722,15 @@ struct device_operations default_pci_ops_bus = {
|
||||||
* blocks to figure out the type of downstream bridge. PCI-X, PCI-E, and
|
* blocks to figure out the type of downstream bridge. PCI-X, PCI-E, and
|
||||||
* Hypertransport all seem to have appropriate capabilities.
|
* Hypertransport all seem to have appropriate capabilities.
|
||||||
*
|
*
|
||||||
* When only a PCI-Express capability is found the type
|
* When only a PCI-Express capability is found the type is examined to see
|
||||||
* is examined to see which type of bridge we have.
|
* which type of bridge we have.
|
||||||
*
|
*
|
||||||
* @param dev Pointer to the device structure of the bridge.
|
* @param dev Pointer to the device structure of the bridge.
|
||||||
* @return Appropriate bridge operations.
|
* @return Appropriate bridge operations.
|
||||||
*/
|
*/
|
||||||
static struct device_operations *get_pci_bridge_ops(device_t dev)
|
static struct device_operations *get_pci_bridge_ops(device_t dev)
|
||||||
{
|
{
|
||||||
unsigned pos;
|
unsigned int pos;
|
||||||
|
|
||||||
#if CONFIG_PCIX_PLUGIN_SUPPORT == 1
|
#if CONFIG_PCIX_PLUGIN_SUPPORT == 1
|
||||||
pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
|
pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
|
||||||
|
@ -729,16 +740,16 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
#if CONFIG_AGP_PLUGIN_SUPPORT == 1
|
#if CONFIG_AGP_PLUGIN_SUPPORT == 1
|
||||||
/* How do I detect an PCI to AGP bridge? */
|
/* How do I detect a PCI to AGP bridge? */
|
||||||
#endif
|
#endif
|
||||||
#if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT == 1
|
#if CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT == 1
|
||||||
pos = 0;
|
pos = 0;
|
||||||
while ((pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos))) {
|
while ((pos = pci_find_next_capability(dev, PCI_CAP_ID_HT, pos))) {
|
||||||
unsigned flags;
|
u16 flags;
|
||||||
flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
|
flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
|
||||||
if ((flags >> 13) == 1) {
|
if ((flags >> 13) == 1) {
|
||||||
/* Host or Secondary Interface */
|
/* Host or Secondary Interface */
|
||||||
printk(BIOS_DEBUG, "%s subordinate bus Hypertransport\n",
|
printk(BIOS_DEBUG, "%s subordinate bus HT\n",
|
||||||
dev_path(dev));
|
dev_path(dev));
|
||||||
return &default_ht_ops_bus;
|
return &default_ht_ops_bus;
|
||||||
}
|
}
|
||||||
|
@ -747,7 +758,7 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
|
||||||
#if CONFIG_PCIEXP_PLUGIN_SUPPORT == 1
|
#if CONFIG_PCIEXP_PLUGIN_SUPPORT == 1
|
||||||
pos = pci_find_capability(dev, PCI_CAP_ID_PCIE);
|
pos = pci_find_capability(dev, PCI_CAP_ID_PCIE);
|
||||||
if (pos) {
|
if (pos) {
|
||||||
unsigned flags;
|
u16 flags;
|
||||||
flags = pci_read_config16(dev, pos + PCI_EXP_FLAGS);
|
flags = pci_read_config16(dev, pos + PCI_EXP_FLAGS);
|
||||||
switch ((flags & PCI_EXP_FLAGS_TYPE) >> 4) {
|
switch ((flags & PCI_EXP_FLAGS_TYPE) >> 4) {
|
||||||
case PCI_EXP_TYPE_ROOT_PORT:
|
case PCI_EXP_TYPE_ROOT_PORT:
|
||||||
|
@ -757,7 +768,8 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
|
||||||
dev_path(dev));
|
dev_path(dev));
|
||||||
return &default_pciexp_ops_bus;
|
return &default_pciexp_ops_bus;
|
||||||
case PCI_EXP_TYPE_PCI_BRIDGE:
|
case PCI_EXP_TYPE_PCI_BRIDGE:
|
||||||
printk(BIOS_DEBUG, "%s subordinate PCI\n", dev_path(dev));
|
printk(BIOS_DEBUG, "%s subordinate PCI\n",
|
||||||
|
dev_path(dev));
|
||||||
return &default_pci_ops_bus;
|
return &default_pci_ops_bus;
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
|
@ -779,11 +791,12 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
|
||||||
static void set_pci_ops(struct device *dev)
|
static void set_pci_ops(struct device *dev)
|
||||||
{
|
{
|
||||||
struct pci_driver *driver;
|
struct pci_driver *driver;
|
||||||
if (dev->ops) {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Look through the list of setup drivers and find one for
|
if (dev->ops)
|
||||||
|
return;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Look through the list of setup drivers and find one for
|
||||||
* this PCI device.
|
* this PCI device.
|
||||||
*/
|
*/
|
||||||
for (driver = &pci_drivers[0]; driver != &epci_drivers[0]; driver++) {
|
for (driver = &pci_drivers[0]; driver != &epci_drivers[0]; driver++) {
|
||||||
|
@ -791,16 +804,15 @@ static void set_pci_ops(struct device *dev)
|
||||||
(driver->device == dev->device)) {
|
(driver->device == dev->device)) {
|
||||||
dev->ops = (struct device_operations *)driver->ops;
|
dev->ops = (struct device_operations *)driver->ops;
|
||||||
printk(BIOS_SPEW, "%s [%04x/%04x] %sops\n",
|
printk(BIOS_SPEW, "%s [%04x/%04x] %sops\n",
|
||||||
dev_path(dev),
|
dev_path(dev), driver->vendor, driver->device,
|
||||||
driver->vendor, driver->device,
|
|
||||||
(driver->ops->scan_bus ? "bus " : ""));
|
(driver->ops->scan_bus ? "bus " : ""));
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* If I don't have a specific driver use the default operations */
|
/* If I don't have a specific driver use the default operations. */
|
||||||
switch (dev->hdr_type & 0x7f) { /* header type */
|
switch (dev->hdr_type & 0x7f) { /* Header type */
|
||||||
case PCI_HEADER_TYPE_NORMAL: /* standard header */
|
case PCI_HEADER_TYPE_NORMAL:
|
||||||
if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
|
if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
|
||||||
goto bad;
|
goto bad;
|
||||||
dev->ops = &default_pci_ops_dev;
|
dev->ops = &default_pci_ops_dev;
|
||||||
|
@ -818,14 +830,12 @@ static void set_pci_ops(struct device *dev)
|
||||||
default:
|
default:
|
||||||
bad:
|
bad:
|
||||||
if (dev->enabled) {
|
if (dev->enabled) {
|
||||||
printk(BIOS_ERR, "%s [%04x/%04x/%06x] has unknown header "
|
printk(BIOS_ERR, "%s [%04x/%04x/%06x] has unknown "
|
||||||
"type %02x, ignoring.\n",
|
"header type %02x, ignoring.\n", dev_path(dev),
|
||||||
dev_path(dev),
|
|
||||||
dev->vendor, dev->device,
|
dev->vendor, dev->device,
|
||||||
dev->class >> 8, dev->hdr_type);
|
dev->class >> 8, dev->hdr_type);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
return;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -843,10 +853,11 @@ static void set_pci_ops(struct device *dev)
|
||||||
static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn)
|
static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn)
|
||||||
{
|
{
|
||||||
struct device *dev;
|
struct device *dev;
|
||||||
|
|
||||||
dev = 0;
|
dev = 0;
|
||||||
for (; *list; list = &(*list)->sibling) {
|
for (; *list; list = &(*list)->sibling) {
|
||||||
if ((*list)->path.type != DEVICE_PATH_PCI) {
|
if ((*list)->path.type != DEVICE_PATH_PCI) {
|
||||||
printk(BIOS_ERR, "child %s not a pci device\n",
|
printk(BIOS_ERR, "child %s not a PCI device\n",
|
||||||
dev_path(*list));
|
dev_path(*list));
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
@ -859,24 +870,25 @@ static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Just like alloc_dev() add the device to the list of devices on the
|
/*
|
||||||
|
* Just like alloc_dev() add the device to the list of devices on the
|
||||||
* bus. When the list of devices was formed we removed all of the
|
* bus. When the list of devices was formed we removed all of the
|
||||||
* parents children, and now we are interleaving static and dynamic
|
* parents children, and now we are interleaving static and dynamic
|
||||||
* devices in order on the bus.
|
* devices in order on the bus.
|
||||||
*/
|
*/
|
||||||
if (dev) {
|
if (dev) {
|
||||||
struct device *child;
|
struct device *child;
|
||||||
|
|
||||||
/* Find the last child of our parent. */
|
/* Find the last child of our parent. */
|
||||||
for (child = dev->bus->children; child && child->sibling;) {
|
for (child = dev->bus->children; child && child->sibling;)
|
||||||
child = child->sibling;
|
child = child->sibling;
|
||||||
}
|
|
||||||
/* Place the device on the list of children of its parent. */
|
/* Place the device on the list of children of its parent. */
|
||||||
if (child) {
|
if (child)
|
||||||
child->sibling = dev;
|
child->sibling = dev;
|
||||||
} else {
|
else
|
||||||
dev->bus->children = dev;
|
dev->bus->children = dev;
|
||||||
}
|
}
|
||||||
}
|
|
||||||
|
|
||||||
return dev;
|
return dev;
|
||||||
}
|
}
|
||||||
|
@ -900,25 +912,29 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn)
|
||||||
/* Detect if a device is present. */
|
/* Detect if a device is present. */
|
||||||
if (!dev) {
|
if (!dev) {
|
||||||
struct device dummy;
|
struct device dummy;
|
||||||
|
|
||||||
dummy.bus = bus;
|
dummy.bus = bus;
|
||||||
dummy.path.type = DEVICE_PATH_PCI;
|
dummy.path.type = DEVICE_PATH_PCI;
|
||||||
dummy.path.pci.devfn = devfn;
|
dummy.path.pci.devfn = devfn;
|
||||||
|
|
||||||
id = pci_read_config32(&dummy, PCI_VENDOR_ID);
|
id = pci_read_config32(&dummy, PCI_VENDOR_ID);
|
||||||
/* Have we found something?
|
/*
|
||||||
* Some broken boards return 0 if a slot is empty, but
|
* Have we found something? Some broken boards return 0 if a
|
||||||
* the expected answer is 0xffffffff
|
* slot is empty, but the expected answer is 0xffffffff.
|
||||||
*/
|
*/
|
||||||
if (id == 0xffffffff) {
|
if (id == 0xffffffff)
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
|
||||||
if ((id == 0x00000000) || (id == 0x0000ffff) ||
|
if ((id == 0x00000000) || (id == 0x0000ffff) ||
|
||||||
(id == 0xffff0000)) {
|
(id == 0xffff0000)) {
|
||||||
printk(BIOS_SPEW, "%s, bad id 0x%x\n", dev_path(&dummy), id);
|
printk(BIOS_SPEW, "%s, bad id 0x%x\n",
|
||||||
|
dev_path(&dummy), id);
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
dev = alloc_dev(bus, &dummy.path);
|
dev = alloc_dev(bus, &dummy.path);
|
||||||
} else {
|
} else {
|
||||||
/* Enable/disable the device. Once we have found the device-
|
/*
|
||||||
|
* Enable/disable the device. Once we have found the device-
|
||||||
* specific operations this operations we will disable the
|
* specific operations this operations we will disable the
|
||||||
* device with those as well.
|
* device with those as well.
|
||||||
*
|
*
|
||||||
|
@ -929,13 +945,14 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn)
|
||||||
* it may be absent and enable_dev() must cope.
|
* it may be absent and enable_dev() must cope.
|
||||||
*/
|
*/
|
||||||
/* Run the magic enable sequence for the device. */
|
/* Run the magic enable sequence for the device. */
|
||||||
if (dev->chip_ops && dev->chip_ops->enable_dev) {
|
if (dev->chip_ops && dev->chip_ops->enable_dev)
|
||||||
dev->chip_ops->enable_dev(dev);
|
dev->chip_ops->enable_dev(dev);
|
||||||
}
|
|
||||||
/* Now read the vendor and device ID. */
|
/* Now read the vendor and device ID. */
|
||||||
id = pci_read_config32(dev, PCI_VENDOR_ID);
|
id = pci_read_config32(dev, PCI_VENDOR_ID);
|
||||||
|
|
||||||
/* If the device does not have a PCI ID disable it. Possibly
|
/*
|
||||||
|
* If the device does not have a PCI ID disable it. Possibly
|
||||||
* this is because we have already disabled the device. But
|
* this is because we have already disabled the device. But
|
||||||
* this also handles optional devices that may not always
|
* this also handles optional devices that may not always
|
||||||
* show up.
|
* show up.
|
||||||
|
@ -944,13 +961,14 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn)
|
||||||
if ((id == 0xffffffff) || (id == 0x00000000) ||
|
if ((id == 0xffffffff) || (id == 0x00000000) ||
|
||||||
(id == 0x0000ffff) || (id == 0xffff0000)) {
|
(id == 0x0000ffff) || (id == 0xffff0000)) {
|
||||||
if (dev->enabled) {
|
if (dev->enabled) {
|
||||||
printk(BIOS_INFO, "PCI: Static device %s not found, disabling it.\n",
|
printk(BIOS_INFO, "PCI: Static device %s not "
|
||||||
dev_path(dev));
|
"found, disabling it.\n", dev_path(dev));
|
||||||
dev->enabled = 0;
|
dev->enabled = 0;
|
||||||
}
|
}
|
||||||
return dev;
|
return dev;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Read the rest of the PCI configuration information. */
|
/* Read the rest of the PCI configuration information. */
|
||||||
hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
|
hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
|
||||||
class = pci_read_config32(dev, PCI_CLASS_REVISION);
|
class = pci_read_config32(dev, PCI_CLASS_REVISION);
|
||||||
|
@ -964,25 +982,23 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn)
|
||||||
dev->class = class >> 8;
|
dev->class = class >> 8;
|
||||||
|
|
||||||
/* Architectural/System devices always need to be bus masters. */
|
/* Architectural/System devices always need to be bus masters. */
|
||||||
if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM) {
|
if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM)
|
||||||
dev->command |= PCI_COMMAND_MASTER;
|
dev->command |= PCI_COMMAND_MASTER;
|
||||||
}
|
|
||||||
/* Look at the vendor and device ID, or at least the header type and
|
/*
|
||||||
|
* Look at the vendor and device ID, or at least the header type and
|
||||||
* class and figure out which set of configuration methods to use.
|
* class and figure out which set of configuration methods to use.
|
||||||
* Unless we already have some PCI ops.
|
* Unless we already have some PCI ops.
|
||||||
*/
|
*/
|
||||||
set_pci_ops(dev);
|
set_pci_ops(dev);
|
||||||
|
|
||||||
/* Now run the magic enable/disable sequence for the device. */
|
/* Now run the magic enable/disable sequence for the device. */
|
||||||
if (dev->ops && dev->ops->enable) {
|
if (dev->ops && dev->ops->enable)
|
||||||
dev->ops->enable(dev);
|
dev->ops->enable(dev);
|
||||||
}
|
|
||||||
|
|
||||||
/* Display the device. */
|
/* Display the device. */
|
||||||
printk(BIOS_DEBUG, "%s [%04x/%04x] %s%s\n",
|
printk(BIOS_DEBUG, "%s [%04x/%04x] %s%s\n", dev_path(dev),
|
||||||
dev_path(dev),
|
dev->vendor, dev->device, dev->enabled ? "enabled" : "disabled",
|
||||||
dev->vendor, dev->device,
|
|
||||||
dev->enabled ? "enabled" : "disabled",
|
|
||||||
dev->ops ? "" : " No operations");
|
dev->ops ? "" : " No operations");
|
||||||
|
|
||||||
return dev;
|
return dev;
|
||||||
|
@ -1003,9 +1019,8 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn)
|
||||||
* @param max Current bus number.
|
* @param max Current bus number.
|
||||||
* @return The maximum bus number found, after scanning all subordinate busses.
|
* @return The maximum bus number found, after scanning all subordinate busses.
|
||||||
*/
|
*/
|
||||||
unsigned int pci_scan_bus(struct bus *bus,
|
unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn,
|
||||||
unsigned min_devfn, unsigned max_devfn,
|
unsigned max_devfn, unsigned int max)
|
||||||
unsigned int max)
|
|
||||||
{
|
{
|
||||||
unsigned int devfn;
|
unsigned int devfn;
|
||||||
struct device *old_devices;
|
struct device *old_devices;
|
||||||
|
@ -1018,11 +1033,12 @@ unsigned int pci_scan_bus(struct bus *bus,
|
||||||
printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %02x\n", bus->secondary);
|
printk(BIOS_DEBUG, "PCI: pci_scan_bus for bus %02x\n", bus->secondary);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// Maximum sane devfn is 0xFF
|
/* Maximum sane devfn is 0xFF. */
|
||||||
if (max_devfn > 0xff) {
|
if (max_devfn > 0xff) {
|
||||||
printk(BIOS_ERR, "PCI: pci_scan_bus limits devfn %x - devfn %x\n",
|
printk(BIOS_ERR, "PCI: pci_scan_bus limits devfn %x - "
|
||||||
min_devfn, max_devfn );
|
"devfn %x\n", min_devfn, max_devfn);
|
||||||
printk(BIOS_ERR, "PCI: pci_scan_bus upper limit too big. Using 0xff.\n");
|
printk(BIOS_ERR, "PCI: pci_scan_bus upper limit too big. "
|
||||||
|
"Using 0xff.\n");
|
||||||
max_devfn=0xff;
|
max_devfn=0xff;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1030,50 +1046,55 @@ unsigned int pci_scan_bus(struct bus *bus,
|
||||||
bus->children = NULL;
|
bus->children = NULL;
|
||||||
|
|
||||||
post_code(0x24);
|
post_code(0x24);
|
||||||
/* Probe all devices/functions on this bus with some optimization for
|
|
||||||
|
/*
|
||||||
|
* Probe all devices/functions on this bus with some optimization for
|
||||||
* non-existence and single function devices.
|
* non-existence and single function devices.
|
||||||
*/
|
*/
|
||||||
for (devfn = min_devfn; devfn <= max_devfn; devfn++) {
|
for (devfn = min_devfn; devfn <= max_devfn; devfn++) {
|
||||||
struct device *dev;
|
struct device *dev;
|
||||||
|
|
||||||
/* First thing setup the device structure */
|
/* First thing setup the device structure. */
|
||||||
dev = pci_scan_get_dev(&old_devices, devfn);
|
dev = pci_scan_get_dev(&old_devices, devfn);
|
||||||
|
|
||||||
/* See if a device is present and setup the device structure. */
|
/* See if a device is present and setup the device structure. */
|
||||||
dev = pci_probe_dev(dev, bus, devfn);
|
dev = pci_probe_dev(dev, bus, devfn);
|
||||||
|
|
||||||
/* If this is not a multi function device, or the device is
|
/*
|
||||||
|
* If this is not a multi function device, or the device is
|
||||||
* not present don't waste time probing another function.
|
* not present don't waste time probing another function.
|
||||||
* Skip to next device.
|
* Skip to next device.
|
||||||
*/
|
*/
|
||||||
if ((PCI_FUNC(devfn) == 0x00) &&
|
if ((PCI_FUNC(devfn) == 0x00) && (!dev
|
||||||
(!dev
|
|
||||||
|| (dev->enabled && ((dev->hdr_type & 0x80) != 0x80)))) {
|
|| (dev->enabled && ((dev->hdr_type & 0x80) != 0x80)))) {
|
||||||
devfn += 0x07;
|
devfn += 0x07;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
post_code(0x25);
|
post_code(0x25);
|
||||||
|
|
||||||
/* Warn if any leftover static devices are are found.
|
/*
|
||||||
* There's probably a problem in the Config.lb.
|
* Warn if any leftover static devices are are found.
|
||||||
|
* There's probably a problem in devicetree.cb.
|
||||||
*/
|
*/
|
||||||
if (old_devices) {
|
if (old_devices) {
|
||||||
device_t left;
|
device_t left;
|
||||||
printk(BIOS_WARNING, "PCI: Left over static devices:\n");
|
printk(BIOS_WARNING, "PCI: Left over static devices:\n");
|
||||||
for (left = old_devices; left; left = left->sibling) {
|
for (left = old_devices; left; left = left->sibling)
|
||||||
printk(BIOS_WARNING, "%s\n", dev_path(left));
|
printk(BIOS_WARNING, "%s\n", dev_path(left));
|
||||||
}
|
|
||||||
printk(BIOS_WARNING, "PCI: Check your mainboard Config.lb.\n");
|
printk(BIOS_WARNING, "PCI: Check your devicetree.cb.\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
/* For all children that implement scan_bus() (i.e. bridges)
|
/*
|
||||||
|
* For all children that implement scan_bus() (i.e. bridges)
|
||||||
* scan the bus behind that child.
|
* scan the bus behind that child.
|
||||||
*/
|
*/
|
||||||
for (child = bus->children; child; child = child->sibling) {
|
for (child = bus->children; child; child = child->sibling)
|
||||||
max = scan_bus(child, max);
|
max = scan_bus(child, max);
|
||||||
}
|
|
||||||
|
|
||||||
/* We've scanned the bus and so we know all about what's on the other
|
/*
|
||||||
|
* We've scanned the bus and so we know all about what's on the other
|
||||||
* side of any bridges that may be on this bus plus any devices.
|
* side of any bridges that may be on this bus plus any devices.
|
||||||
* Return how far we've got finding sub-buses.
|
* Return how far we've got finding sub-buses.
|
||||||
*/
|
*/
|
||||||
|
@ -1119,7 +1140,8 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
|
||||||
|
|
||||||
bus = dev->link_list;
|
bus = dev->link_list;
|
||||||
|
|
||||||
/* Set up the primary, secondary and subordinate bus numbers. We have
|
/*
|
||||||
|
* Set up the primary, secondary and subordinate bus numbers. We have
|
||||||
* no idea how many buses are behind this bridge yet, so we set the
|
* no idea how many buses are behind this bridge yet, so we set the
|
||||||
* subordinate bus number to 0xff for the moment.
|
* subordinate bus number to 0xff for the moment.
|
||||||
*/
|
*/
|
||||||
|
@ -1131,12 +1153,14 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
|
||||||
pci_write_config16(dev, PCI_COMMAND, 0x0000);
|
pci_write_config16(dev, PCI_COMMAND, 0x0000);
|
||||||
pci_write_config16(dev, PCI_STATUS, 0xffff);
|
pci_write_config16(dev, PCI_STATUS, 0xffff);
|
||||||
|
|
||||||
/* Read the existing primary/secondary/subordinate bus
|
/*
|
||||||
|
* Read the existing primary/secondary/subordinate bus
|
||||||
* number configuration.
|
* number configuration.
|
||||||
*/
|
*/
|
||||||
buses = pci_read_config32(dev, PCI_PRIMARY_BUS);
|
buses = pci_read_config32(dev, PCI_PRIMARY_BUS);
|
||||||
|
|
||||||
/* Configure the bus numbers for this bridge: the configuration
|
/*
|
||||||
|
* Configure the bus numbers for this bridge: the configuration
|
||||||
* transactions will not be propagated by the bridge if it is not
|
* transactions will not be propagated by the bridge if it is not
|
||||||
* correctly configured.
|
* correctly configured.
|
||||||
*/
|
*/
|
||||||
|
@ -1146,12 +1170,11 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
|
||||||
((unsigned int)(bus->subordinate) << 16));
|
((unsigned int)(bus->subordinate) << 16));
|
||||||
pci_write_config32(dev, PCI_PRIMARY_BUS, buses);
|
pci_write_config32(dev, PCI_PRIMARY_BUS, buses);
|
||||||
|
|
||||||
/* Now we can scan all subordinate buses
|
/* Now we can scan all subordinate buses (those behind the bridge). */
|
||||||
* i.e. the bus behind the bridge.
|
|
||||||
*/
|
|
||||||
max = do_scan_bus(bus, 0x00, 0xff, max);
|
max = do_scan_bus(bus, 0x00, 0xff, max);
|
||||||
|
|
||||||
/* We know the number of buses behind this bridge. Set the subordinate
|
/*
|
||||||
|
* We know the number of buses behind this bridge. Set the subordinate
|
||||||
* bus number to its real value.
|
* bus number to its real value.
|
||||||
*/
|
*/
|
||||||
bus->subordinate = max;
|
bus->subordinate = max;
|
||||||
|
@ -1216,10 +1239,9 @@ void pci_assign_irqs(unsigned bus, unsigned slot,
|
||||||
{
|
{
|
||||||
unsigned int funct;
|
unsigned int funct;
|
||||||
device_t pdev;
|
device_t pdev;
|
||||||
u8 line;
|
u8 line, irq;
|
||||||
u8 irq;
|
|
||||||
|
|
||||||
/* Each slot may contain up to eight functions */
|
/* Each slot may contain up to eight functions. */
|
||||||
for (funct = 0; funct < 8; funct++) {
|
for (funct = 0; funct < 8; funct++) {
|
||||||
pdev = dev_find_slot(bus, (slot << 3) + funct);
|
pdev = dev_find_slot(bus, (slot << 3) + funct);
|
||||||
|
|
||||||
|
@ -1228,7 +1250,7 @@ void pci_assign_irqs(unsigned bus, unsigned slot,
|
||||||
|
|
||||||
line = pci_read_config8(pdev, PCI_INTERRUPT_PIN);
|
line = pci_read_config8(pdev, PCI_INTERRUPT_PIN);
|
||||||
|
|
||||||
// PCI spec says all values except 1..4 are reserved.
|
/* PCI spec says all values except 1..4 are reserved. */
|
||||||
if ((line < 1) || (line > 4))
|
if ((line < 1) || (line > 4))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
|
@ -1245,9 +1267,9 @@ void pci_assign_irqs(unsigned bus, unsigned slot,
|
||||||
printk(BIOS_DEBUG, " Readback = %d\n", irq);
|
printk(BIOS_DEBUG, " Readback = %d\n", irq);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// Change to level triggered
|
/* Change to level triggered. */
|
||||||
i8259_configure_irq_trigger(pIntAtoD[line - 1], IRQ_LEVEL_TRIGGERED);
|
i8259_configure_irq_trigger(pIntAtoD[line - 1],
|
||||||
|
IRQ_LEVEL_TRIGGERED);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -40,91 +40,110 @@ static struct bus *get_pbus(device_t dev)
|
||||||
|
|
||||||
while (pbus && pbus->dev && !ops_pci_bus(pbus)) {
|
while (pbus && pbus->dev && !ops_pci_bus(pbus)) {
|
||||||
if (pbus == pbus->dev->bus) {
|
if (pbus == pbus->dev->bus) {
|
||||||
printk(BIOS_ALERT, "%s in endless loop looking for a parent "
|
printk(BIOS_ALERT, "%s in endless loop looking for a "
|
||||||
"bus with ops_pci_bus for %s, breaking out.\n",
|
"parent bus with ops_pci_bus for %s, breaking "
|
||||||
__func__, dev_path(dev));
|
"out.\n", __func__, dev_path(dev));
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
pbus = pbus->dev->bus;
|
pbus = pbus->dev->bus;
|
||||||
}
|
}
|
||||||
if (!pbus || !pbus->dev || !pbus->dev->ops || !pbus->dev->ops->ops_pci_bus) {
|
|
||||||
/* This can happen before the device tree is set up completely. */
|
if (!pbus || !pbus->dev || !pbus->dev->ops
|
||||||
//printk(BIOS_EMERG, "%s: Cannot find pci bus operations.\n", dev_path(dev));
|
|| !pbus->dev->ops->ops_pci_bus) {
|
||||||
|
/* This can happen before the device tree is fully set up. */
|
||||||
|
|
||||||
|
// printk(BIOS_EMERG, "%s: Cannot find PCI bus operations.\n",
|
||||||
|
// dev_path(dev));
|
||||||
|
|
||||||
pbus = NULL;
|
pbus = NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
return pbus;
|
return pbus;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t pci_read_config8(device_t dev, unsigned where)
|
u8 pci_read_config8(device_t dev, unsigned int where)
|
||||||
{
|
{
|
||||||
struct bus *pbus = get_pbus(dev);
|
struct bus *pbus = get_pbus(dev);
|
||||||
return ops_pci_bus(pbus)->read8(pbus, dev->bus->secondary, dev->path.pci.devfn, where);
|
return ops_pci_bus(pbus)->read8(pbus, dev->bus->secondary,
|
||||||
|
dev->path.pci.devfn, where);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint16_t pci_read_config16(device_t dev, unsigned where)
|
u16 pci_read_config16(device_t dev, unsigned int where)
|
||||||
{
|
{
|
||||||
struct bus *pbus = get_pbus(dev);
|
struct bus *pbus = get_pbus(dev);
|
||||||
return ops_pci_bus(pbus)->read16(pbus, dev->bus->secondary, dev->path.pci.devfn, where);
|
return ops_pci_bus(pbus)->read16(pbus, dev->bus->secondary,
|
||||||
|
dev->path.pci.devfn, where);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t pci_read_config32(device_t dev, unsigned where)
|
u32 pci_read_config32(device_t dev, unsigned int where)
|
||||||
{
|
{
|
||||||
struct bus *pbus = get_pbus(dev);
|
struct bus *pbus = get_pbus(dev);
|
||||||
return ops_pci_bus(pbus)->read32(pbus, dev->bus->secondary, dev->path.pci.devfn, where);
|
return ops_pci_bus(pbus)->read32(pbus, dev->bus->secondary,
|
||||||
|
dev->path.pci.devfn, where);
|
||||||
}
|
}
|
||||||
|
|
||||||
void pci_write_config8(device_t dev, unsigned where, uint8_t val)
|
void pci_write_config8(device_t dev, unsigned int where, u8 val)
|
||||||
{
|
{
|
||||||
struct bus *pbus = get_pbus(dev);
|
struct bus *pbus = get_pbus(dev);
|
||||||
ops_pci_bus(pbus)->write8(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val);
|
ops_pci_bus(pbus)->write8(pbus, dev->bus->secondary,
|
||||||
|
dev->path.pci.devfn, where, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void pci_write_config16(device_t dev, unsigned where, uint16_t val)
|
void pci_write_config16(device_t dev, unsigned int where, u16 val)
|
||||||
{
|
{
|
||||||
struct bus *pbus = get_pbus(dev);
|
struct bus *pbus = get_pbus(dev);
|
||||||
ops_pci_bus(pbus)->write16(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val);
|
ops_pci_bus(pbus)->write16(pbus, dev->bus->secondary,
|
||||||
|
dev->path.pci.devfn, where, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void pci_write_config32(device_t dev, unsigned where, uint32_t val)
|
void pci_write_config32(device_t dev, unsigned int where, u32 val)
|
||||||
{
|
{
|
||||||
struct bus *pbus = get_pbus(dev);
|
struct bus *pbus = get_pbus(dev);
|
||||||
ops_pci_bus(pbus)->write32(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val);
|
ops_pci_bus(pbus)->write32(pbus, dev->bus->secondary,
|
||||||
|
dev->path.pci.devfn, where, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
#if CONFIG_MMCONF_SUPPORT
|
#if CONFIG_MMCONF_SUPPORT
|
||||||
uint8_t pci_mmio_read_config8(device_t dev, unsigned where)
|
u8 pci_mmio_read_config8(device_t dev, unsigned int where)
|
||||||
{
|
{
|
||||||
struct bus *pbus = get_pbus(dev);
|
struct bus *pbus = get_pbus(dev);
|
||||||
return pci_ops_mmconf.read8(pbus, dev->bus->secondary, dev->path.pci.devfn, where);
|
return pci_ops_mmconf.read8(pbus, dev->bus->secondary,
|
||||||
|
dev->path.pci.devfn, where);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint16_t pci_mmio_read_config16(device_t dev, unsigned where)
|
u16 pci_mmio_read_config16(device_t dev, unsigned int where)
|
||||||
{
|
{
|
||||||
struct bus *pbus = get_pbus(dev);
|
struct bus *pbus = get_pbus(dev);
|
||||||
return pci_ops_mmconf.read16(pbus, dev->bus->secondary, dev->path.pci.devfn, where);
|
return pci_ops_mmconf.read16(pbus, dev->bus->secondary,
|
||||||
|
dev->path.pci.devfn, where);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t pci_mmio_read_config32(device_t dev, unsigned where)
|
u32 pci_mmio_read_config32(device_t dev, unsigned int where)
|
||||||
{
|
{
|
||||||
struct bus *pbus = get_pbus(dev);
|
struct bus *pbus = get_pbus(dev);
|
||||||
return pci_ops_mmconf.read32(pbus, dev->bus->secondary, dev->path.pci.devfn, where);
|
return pci_ops_mmconf.read32(pbus, dev->bus->secondary,
|
||||||
|
dev->path.pci.devfn, where);
|
||||||
}
|
}
|
||||||
|
|
||||||
void pci_mmio_write_config8(device_t dev, unsigned where, uint8_t val)
|
void pci_mmio_write_config8(device_t dev, unsigned int where, u8 val)
|
||||||
{
|
{
|
||||||
struct bus *pbus = get_pbus(dev);
|
struct bus *pbus = get_pbus(dev);
|
||||||
pci_ops_mmconf.write8(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val);
|
pci_ops_mmconf.write8(pbus, dev->bus->secondary, dev->path.pci.devfn,
|
||||||
|
where, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void pci_mmio_write_config16(device_t dev, unsigned where, uint16_t val)
|
void pci_mmio_write_config16(device_t dev, unsigned int where, u16 val)
|
||||||
{
|
{
|
||||||
struct bus *pbus = get_pbus(dev);
|
struct bus *pbus = get_pbus(dev);
|
||||||
pci_ops_mmconf.write16(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val);
|
pci_ops_mmconf.write16(pbus, dev->bus->secondary, dev->path.pci.devfn,
|
||||||
|
where, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
void pci_mmio_write_config32(device_t dev, unsigned where, uint32_t val)
|
void pci_mmio_write_config32(device_t dev, unsigned int where, u32 val)
|
||||||
{
|
{
|
||||||
struct bus *pbus = get_pbus(dev);
|
struct bus *pbus = get_pbus(dev);
|
||||||
pci_ops_mmconf.write32(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val);
|
pci_ops_mmconf.write32(pbus, dev->bus->secondary, dev->path.pci.devfn,
|
||||||
|
where, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -38,54 +38,57 @@ struct rom_header *pci_rom_probe(struct device *dev)
|
||||||
rom_header = cbfs_load_optionrom(dev->vendor, dev->device, NULL);
|
rom_header = cbfs_load_optionrom(dev->vendor, dev->device, NULL);
|
||||||
|
|
||||||
if (rom_header) {
|
if (rom_header) {
|
||||||
printk(BIOS_DEBUG, "In cbfs, rom address for %s = %p\n",
|
printk(BIOS_DEBUG, "In CBFS, ROM address for %s = %p\n",
|
||||||
dev_path(dev), rom_header);
|
dev_path(dev), rom_header);
|
||||||
} else {
|
} else {
|
||||||
unsigned long rom_address;
|
u32 rom_address;
|
||||||
|
|
||||||
rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS);
|
rom_address = pci_read_config32(dev, PCI_ROM_ADDRESS);
|
||||||
|
|
||||||
if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
|
if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
|
||||||
#if defined(CONFIG_BOARD_EMULATION_QEMU_X86) \
|
#if defined(CONFIG_BOARD_EMULATION_QEMU_X86) && CONFIG_BOARD_EMULATION_QEMU_X86
|
||||||
&& CONFIG_BOARD_EMULATION_QEMU_X86
|
|
||||||
if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
|
if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
|
||||||
rom_address = 0xc0000;
|
rom_address = 0xc0000;
|
||||||
else
|
else
|
||||||
#endif
|
#endif
|
||||||
return NULL;
|
return NULL;
|
||||||
} else {
|
} else {
|
||||||
/* enable expansion ROM address decoding */
|
/* Enable expansion ROM address decoding. */
|
||||||
pci_write_config32(dev, PCI_ROM_ADDRESS,
|
pci_write_config32(dev, PCI_ROM_ADDRESS,
|
||||||
rom_address|PCI_ROM_ADDRESS_ENABLE);
|
rom_address|PCI_ROM_ADDRESS_ENABLE);
|
||||||
}
|
}
|
||||||
|
|
||||||
printk(BIOS_DEBUG, "On card, rom address for %s = %lx\n",
|
printk(BIOS_DEBUG, "On card, ROM address for %s = %lx\n",
|
||||||
dev_path(dev), rom_address);
|
dev_path(dev), (unsigned long)rom_address);
|
||||||
rom_header = (struct rom_header *)rom_address;
|
rom_header = (struct rom_header *)rom_address;
|
||||||
}
|
}
|
||||||
|
|
||||||
printk(BIOS_SPEW, "PCI Expansion ROM, signature 0x%04x, INIT size 0x%04x, data ptr 0x%04x\n",
|
printk(BIOS_SPEW, "PCI expansion ROM, signature 0x%04x, "
|
||||||
|
"INIT size 0x%04x, data ptr 0x%04x\n",
|
||||||
le32_to_cpu(rom_header->signature),
|
le32_to_cpu(rom_header->signature),
|
||||||
rom_header->size * 512, le32_to_cpu(rom_header->data));
|
rom_header->size * 512, le32_to_cpu(rom_header->data));
|
||||||
|
|
||||||
if (le32_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
|
if (le32_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
|
||||||
printk(BIOS_ERR, "Incorrect Expansion ROM Header Signature %04x\n",
|
printk(BIOS_ERR, "Incorrect expansion ROM header "
|
||||||
le32_to_cpu(rom_header->signature));
|
"signature %04x\n", le32_to_cpu(rom_header->signature));
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
rom_data = (((void *)rom_header) + le32_to_cpu(rom_header->data));
|
rom_data = (((void *)rom_header) + le32_to_cpu(rom_header->data));
|
||||||
|
|
||||||
printk(BIOS_SPEW, "PCI ROM Image, Vendor %04x, Device %04x,\n",
|
printk(BIOS_SPEW, "PCI ROM image, vendor ID %04x, device ID %04x,\n",
|
||||||
rom_data->vendor, rom_data->device);
|
|
||||||
if (dev->vendor != rom_data->vendor || dev->device != rom_data->device) {
|
|
||||||
printk(BIOS_ERR, "ID mismatch: Vendor ID %04x, Device ID %04x\n",
|
|
||||||
rom_data->vendor, rom_data->device);
|
rom_data->vendor, rom_data->device);
|
||||||
|
if (dev->vendor != rom_data->vendor
|
||||||
|
|| dev->device != rom_data->device) {
|
||||||
|
printk(BIOS_ERR, "ID mismatch: vendor ID %04x, "
|
||||||
|
"device ID %04x\n", rom_data->vendor, rom_data->device);
|
||||||
return NULL;
|
return NULL;
|
||||||
}
|
}
|
||||||
|
|
||||||
printk(BIOS_SPEW, "PCI ROM Image, Class Code %04x%02x, Code Type %02x\n",
|
printk(BIOS_SPEW, "PCI ROM image, Class Code %04x%02x, "
|
||||||
rom_data->class_hi, rom_data->class_lo,
|
"Code Type %02x\n", rom_data->class_hi, rom_data->class_lo,
|
||||||
rom_data->type);
|
rom_data->type);
|
||||||
|
|
||||||
if (dev->class != ((rom_data->class_hi << 8) | rom_data->class_lo)) {
|
if (dev->class != ((rom_data->class_hi << 8) | rom_data->class_lo)) {
|
||||||
printk(BIOS_DEBUG, "Class Code mismatch ROM %08x, dev %08x\n",
|
printk(BIOS_DEBUG, "Class Code mismatch ROM %08x, dev %08x\n",
|
||||||
(rom_data->class_hi << 8) | rom_data->class_lo,
|
(rom_data->class_hi << 8) | rom_data->class_lo,
|
||||||
|
@ -98,15 +101,21 @@ struct rom_header *pci_rom_probe(struct device *dev)
|
||||||
|
|
||||||
static void *pci_ram_image_start = (void *)PCI_RAM_IMAGE_START;
|
static void *pci_ram_image_start = (void *)PCI_RAM_IMAGE_START;
|
||||||
|
|
||||||
struct rom_header *pci_rom_load(struct device *dev, struct rom_header *rom_header)
|
struct rom_header *pci_rom_load(struct device *dev,
|
||||||
|
struct rom_header *rom_header)
|
||||||
{
|
{
|
||||||
struct pci_data * rom_data;
|
struct pci_data * rom_data;
|
||||||
unsigned int rom_size;
|
unsigned int rom_size;
|
||||||
unsigned int image_size=0;
|
unsigned int image_size=0;
|
||||||
|
|
||||||
do {
|
do {
|
||||||
rom_header = (struct rom_header *)((void *) rom_header + image_size); // get next image
|
/* Get next image. */
|
||||||
rom_data = (struct pci_data *)((void *) rom_header + le32_to_cpu(rom_header->data));
|
rom_header = (struct rom_header *)((void *) rom_header
|
||||||
|
+ image_size);
|
||||||
|
|
||||||
|
rom_data = (struct pci_data *)((void *) rom_header
|
||||||
|
+ le32_to_cpu(rom_header->data));
|
||||||
|
|
||||||
image_size = le32_to_cpu(rom_data->ilen) * 512;
|
image_size = le32_to_cpu(rom_data->ilen) * 512;
|
||||||
} while ((rom_data->type != 0) && (rom_data->indicator != 0)); // make sure we got x86 version
|
} while ((rom_data->type != 0) && (rom_data->indicator != 0)); // make sure we got x86 version
|
||||||
|
|
||||||
|
@ -115,24 +124,28 @@ struct rom_header *pci_rom_load(struct device *dev, struct rom_header *rom_heade
|
||||||
|
|
||||||
rom_size = rom_header->size * 512;
|
rom_size = rom_header->size * 512;
|
||||||
|
|
||||||
// We check to see if the device thinks it is a VGA device not
|
/*
|
||||||
// whether the ROM image is for a VGA device because some
|
* We check to see if the device thinks it is a VGA device not
|
||||||
// devices have a mismatch between the hardware and the ROM
|
* whether the ROM image is for a VGA device because some
|
||||||
|
* devices have a mismatch between the hardware and the ROM.
|
||||||
|
*/
|
||||||
if (PCI_CLASS_DISPLAY_VGA == (dev->class >> 8)) {
|
if (PCI_CLASS_DISPLAY_VGA == (dev->class >> 8)) {
|
||||||
#if CONFIG_CONSOLE_VGA == 1 && CONFIG_CONSOLE_VGA_MULTI == 0
|
#if CONFIG_CONSOLE_VGA == 1 && CONFIG_CONSOLE_VGA_MULTI == 0
|
||||||
extern device_t vga_pri; // the primary vga device, defined in device.c
|
extern device_t vga_pri; /* Primary VGA device (device.c). */
|
||||||
if (dev != vga_pri) return NULL; // only one VGA supported
|
if (dev != vga_pri) return NULL; /* Only one VGA supported. */
|
||||||
#endif
|
#endif
|
||||||
if ((void *)PCI_VGA_RAM_IMAGE_START != rom_header) {
|
if ((void *)PCI_VGA_RAM_IMAGE_START != rom_header) {
|
||||||
printk(BIOS_DEBUG, "copying VGA ROM Image from %p to 0x%x, 0x%x bytes\n",
|
printk(BIOS_DEBUG, "Copying VGA ROM Image from %p to "
|
||||||
rom_header, PCI_VGA_RAM_IMAGE_START, rom_size);
|
"0x%x, 0x%x bytes\n", rom_header,
|
||||||
memcpy((void *)PCI_VGA_RAM_IMAGE_START, rom_header, rom_size);
|
PCI_VGA_RAM_IMAGE_START, rom_size);
|
||||||
|
memcpy((void *)PCI_VGA_RAM_IMAGE_START, rom_header,
|
||||||
|
rom_size);
|
||||||
}
|
}
|
||||||
return (struct rom_header *) (PCI_VGA_RAM_IMAGE_START);
|
return (struct rom_header *) (PCI_VGA_RAM_IMAGE_START);
|
||||||
}
|
}
|
||||||
|
|
||||||
printk(BIOS_DEBUG, "copying non-VGA ROM Image from %p to %p, 0x%x bytes\n",
|
printk(BIOS_DEBUG, "Copying non-VGA ROM image from %p to %p, 0x%x "
|
||||||
rom_header, pci_ram_image_start, rom_size);
|
"bytes\n", rom_header, pci_ram_image_start, rom_size);
|
||||||
|
|
||||||
memcpy(pci_ram_image_start, rom_header, rom_size);
|
memcpy(pci_ram_image_start, rom_header, rom_size);
|
||||||
pci_ram_image_start += rom_size;
|
pci_ram_image_start += rom_size;
|
||||||
|
|
|
@ -27,6 +27,9 @@
|
||||||
static void pciexp_tune_dev(device_t dev)
|
static void pciexp_tune_dev(device_t dev)
|
||||||
{
|
{
|
||||||
unsigned int cap;
|
unsigned int cap;
|
||||||
|
#ifdef CONFIG_PCIE_TUNING
|
||||||
|
u32 reg32;
|
||||||
|
#endif
|
||||||
|
|
||||||
cap = pci_find_capability(dev, PCI_CAP_ID_PCIE);
|
cap = pci_find_capability(dev, PCI_CAP_ID_PCIE);
|
||||||
if (!cap)
|
if (!cap)
|
||||||
|
@ -35,9 +38,9 @@ static void pciexp_tune_dev(device_t dev)
|
||||||
#ifdef CONFIG_PCIE_TUNING
|
#ifdef CONFIG_PCIE_TUNING
|
||||||
printk(BIOS_DEBUG, "PCIe: tuning %s\n", dev_path(dev));
|
printk(BIOS_DEBUG, "PCIe: tuning %s\n", dev_path(dev));
|
||||||
|
|
||||||
// TODO make this depending on ASPM
|
// TODO make this depending on ASPM.
|
||||||
/* Enable ASPM Role Based Error Reporting */
|
|
||||||
u32 reg32;
|
/* Enable ASPM role based error reporting. */
|
||||||
reg32 = pci_read_config32(dev, cap + PCI_EXP_DEVCAP);
|
reg32 = pci_read_config32(dev, cap + PCI_EXP_DEVCAP);
|
||||||
reg32 |= PCI_EXP_DEVCAP_RBER;
|
reg32 |= PCI_EXP_DEVCAP_RBER;
|
||||||
pci_write_config32(dev, cap + PCI_EXP_DEVCAP, reg32);
|
pci_write_config32(dev, cap + PCI_EXP_DEVCAP, reg32);
|
||||||
|
|
|
@ -56,7 +56,7 @@ static void pcix_tune_dev(device_t dev)
|
||||||
/* Don't attempt to handle PCI-X errors. */
|
/* Don't attempt to handle PCI-X errors. */
|
||||||
cmd &= ~PCI_X_CMD_DPERR_E;
|
cmd &= ~PCI_X_CMD_DPERR_E;
|
||||||
|
|
||||||
/* Enable Relaxed Ordering. */
|
/* Enable relaxed ordering. */
|
||||||
cmd |= PCI_X_CMD_ERO;
|
cmd |= PCI_X_CMD_ERO;
|
||||||
|
|
||||||
if (orig_cmd != cmd)
|
if (orig_cmd != cmd)
|
||||||
|
@ -108,6 +108,7 @@ const char *pcix_speed(u16 sstatus)
|
||||||
result = pcix_533mhz;
|
result = pcix_533mhz;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -163,7 +163,7 @@ struct device_operations pnp_ops = {
|
||||||
.enable = pnp_enable,
|
.enable = pnp_enable,
|
||||||
};
|
};
|
||||||
|
|
||||||
/* PNP chip opertations */
|
/* PNP chip operations */
|
||||||
|
|
||||||
static void pnp_get_ioresource(device_t dev, u8 index, struct io_info *info)
|
static void pnp_get_ioresource(device_t dev, u8 index, struct io_info *info)
|
||||||
{
|
{
|
||||||
|
@ -214,18 +214,15 @@ static void get_resources(device_t dev, struct pnp_info *info)
|
||||||
{
|
{
|
||||||
struct resource *resource;
|
struct resource *resource;
|
||||||
|
|
||||||
if (info->flags & PNP_IO0) {
|
if (info->flags & PNP_IO0)
|
||||||
pnp_get_ioresource(dev, PNP_IDX_IO0, &info->io0);
|
pnp_get_ioresource(dev, PNP_IDX_IO0, &info->io0);
|
||||||
}
|
if (info->flags & PNP_IO1)
|
||||||
if (info->flags & PNP_IO1) {
|
|
||||||
pnp_get_ioresource(dev, PNP_IDX_IO1, &info->io1);
|
pnp_get_ioresource(dev, PNP_IDX_IO1, &info->io1);
|
||||||
}
|
if (info->flags & PNP_IO2)
|
||||||
if (info->flags & PNP_IO2) {
|
|
||||||
pnp_get_ioresource(dev, PNP_IDX_IO2, &info->io2);
|
pnp_get_ioresource(dev, PNP_IDX_IO2, &info->io2);
|
||||||
}
|
if (info->flags & PNP_IO3)
|
||||||
if (info->flags & PNP_IO3) {
|
|
||||||
pnp_get_ioresource(dev, PNP_IDX_IO3, &info->io3);
|
pnp_get_ioresource(dev, PNP_IDX_IO3, &info->io3);
|
||||||
}
|
|
||||||
if (info->flags & PNP_IRQ0) {
|
if (info->flags & PNP_IRQ0) {
|
||||||
resource = new_resource(dev, PNP_IDX_IRQ0);
|
resource = new_resource(dev, PNP_IDX_IRQ0);
|
||||||
resource->size = 1;
|
resource->size = 1;
|
||||||
|
@ -236,6 +233,7 @@ static void get_resources(device_t dev, struct pnp_info *info)
|
||||||
resource->size = 1;
|
resource->size = 1;
|
||||||
resource->flags |= IORESOURCE_IRQ;
|
resource->flags |= IORESOURCE_IRQ;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (info->flags & PNP_DRQ0) {
|
if (info->flags & PNP_DRQ0) {
|
||||||
resource = new_resource(dev, PNP_IDX_DRQ0);
|
resource = new_resource(dev, PNP_IDX_DRQ0);
|
||||||
resource->size = 1;
|
resource->size = 1;
|
||||||
|
|
|
@ -43,7 +43,7 @@ struct bus *get_pbus_smbus(device_t dev)
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Multi-level I2C MUX? may need to find the first i2c device and then set link
|
* Multi-level I2C MUX? May need to find the first I2C device and then set link
|
||||||
* down to current dev.
|
* down to current dev.
|
||||||
*
|
*
|
||||||
* 1 store get_pbus_smbus list link
|
* 1 store get_pbus_smbus list link
|
||||||
|
|
|
@ -120,7 +120,7 @@ void run_bios(struct device *dev, unsigned long addr);
|
||||||
/* Helper functions */
|
/* Helper functions */
|
||||||
device_t find_dev_path(struct bus *parent, struct device_path *path);
|
device_t find_dev_path(struct bus *parent, struct device_path *path);
|
||||||
device_t alloc_find_dev(struct bus *parent, struct device_path *path);
|
device_t alloc_find_dev(struct bus *parent, struct device_path *path);
|
||||||
device_t dev_find_device (unsigned int vendor, unsigned int device, device_t from);
|
device_t dev_find_device (u16 vendor, u16 device, device_t from);
|
||||||
device_t dev_find_class (unsigned int class, device_t from);
|
device_t dev_find_class (unsigned int class, device_t from);
|
||||||
device_t dev_find_slot (unsigned int bus, unsigned int devfn);
|
device_t dev_find_slot (unsigned int bus, unsigned int devfn);
|
||||||
device_t dev_find_slot_on_smbus (unsigned int bus, unsigned int addr);
|
device_t dev_find_slot_on_smbus (unsigned int bus, unsigned int addr);
|
||||||
|
|
|
@ -15,6 +15,7 @@
|
||||||
#ifndef PCI_H
|
#ifndef PCI_H
|
||||||
#define PCI_H
|
#define PCI_H
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
#include <device/pci_def.h>
|
#include <device/pci_def.h>
|
||||||
#include <device/resource.h>
|
#include <device/resource.h>
|
||||||
#include <device/device.h>
|
#include <device/device.h>
|
||||||
|
|
|
@ -5,20 +5,20 @@
|
||||||
#include <device/device.h>
|
#include <device/device.h>
|
||||||
#include <arch/pci_ops.h>
|
#include <arch/pci_ops.h>
|
||||||
|
|
||||||
uint8_t pci_read_config8(device_t dev, unsigned where);
|
u8 pci_read_config8(device_t dev, unsigned int where);
|
||||||
uint16_t pci_read_config16(device_t dev, unsigned where);
|
u16 pci_read_config16(device_t dev, unsigned int where);
|
||||||
uint32_t pci_read_config32(device_t dev, unsigned where);
|
u32 pci_read_config32(device_t dev, unsigned int where);
|
||||||
void pci_write_config8(device_t dev, unsigned where, uint8_t val);
|
void pci_write_config8(device_t dev, unsigned int where, u8 val);
|
||||||
void pci_write_config16(device_t dev, unsigned where, uint16_t val);
|
void pci_write_config16(device_t dev, unsigned int where, u16 val);
|
||||||
void pci_write_config32(device_t dev, unsigned where, uint32_t val);
|
void pci_write_config32(device_t dev, unsigned int where, u32 val);
|
||||||
|
|
||||||
#if CONFIG_MMCONF_SUPPORT
|
#if CONFIG_MMCONF_SUPPORT
|
||||||
uint8_t pci_mmio_read_config8(device_t dev, unsigned where);
|
u8 pci_mmio_read_config8(device_t dev, unsigned int where);
|
||||||
uint16_t pci_mmio_read_config16(device_t dev, unsigned where);
|
u16 pci_mmio_read_config16(device_t dev, unsigned int where);
|
||||||
uint32_t pci_mmio_read_config32(device_t dev, unsigned where);
|
u32 pci_mmio_read_config32(device_t dev, unsigned int where);
|
||||||
void pci_mmio_write_config8(device_t dev, unsigned where, uint8_t val);
|
void pci_mmio_write_config8(device_t dev, unsigned int where, u8 val);
|
||||||
void pci_mmio_write_config16(device_t dev, unsigned where, uint16_t val);
|
void pci_mmio_write_config16(device_t dev, unsigned int where, u16 val);
|
||||||
void pci_mmio_write_config32(device_t dev, unsigned where, uint32_t val);
|
void pci_mmio_write_config32(device_t dev, unsigned int where, u32 val);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* This function lives in pci_ops_auto.c */
|
/* This function lives in pci_ops_auto.c */
|
||||||
|
|
Loading…
Reference in New Issue