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soc/intel/acpi: Replace Add(a,b,c) with ASL 2.0 syntax 

Replace `Add (a, b, c)` with `c = a + b`, respectively `a += b` where
possible.

Change-Id: I96390f565d6c1ca0f4e06db9ad07af784051650c
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70622
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
This commit is contained in:
Felix Singer 2022-12-12 00:46:05 +01:00
parent 9a37ae6ef6
commit e4c30044f2
7 changed files with 12 additions and 12 deletions
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2
src/soc/intel/baytrail/acpi/dptf/dptf.asl
View File

@ -63,7 +63,7 @@ Device (DPTF)
Multiply (Arg0, 10, Local0)
/* Convert to Kelvin */
Add (Local0, 2732, Local0)
Local0 += 2732
Return (Local0)
}

6
src/soc/intel/baytrail/acpi/gpio.asl
View File

@ -22,7 +22,7 @@ Device (GPSC)
Method (_CRS)
{
CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
Add (IO_BASE_ADDRESS, IO_BASE_OFFSET_GPSCORE, RBAS)
RBAS = IO_BASE_ADDRESS + IO_BASE_OFFSET_GPSCORE
Return (^RBUF)
}
@ -51,7 +51,7 @@ Device (GPNC)
Method (_CRS)
{
CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
Add (IO_BASE_ADDRESS, IO_BASE_OFFSET_GPNCORE, RBAS)
RBAS = IO_BASE_ADDRESS + IO_BASE_OFFSET_GPNCORE
Return (^RBUF)
}
@ -80,7 +80,7 @@ Device (GPSS)
Method (_CRS)
{
CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
Add (IO_BASE_ADDRESS, IO_BASE_OFFSET_GPSSUS, RBAS)
RBAS = IO_BASE_ADDRESS + IO_BASE_OFFSET_GPSSUS
Return (^RBUF)
}

2
src/soc/intel/baytrail/acpi/southcluster.asl
View File

@ -176,7 +176,7 @@ Method (_CRS, 0, Serialized)
/* TOLM is BMBOUND accessible from IOSF so is saved in NVS */
Store (\TOLM, PMIN)
Store (Subtract(CONFIG_ECAM_MMCONF_BASE_ADDRESS, 1), PMAX)
Add (Subtract (PMAX, PMIN), 1, PLEN)
PLEN = Subtract (PMAX, PMIN) + 1
Return (MCRS)
}

2
src/soc/intel/braswell/acpi/dptf/dptf.asl
View File

@ -63,7 +63,7 @@ Device (DPTF)
Multiply (Arg0, 10, Local0)
/* Convert to Kelvin */
Add (Local0, 2732, Local0)
Local0 += 2732
Return (Local0)
}

8
src/soc/intel/braswell/acpi/gpio.asl
View File

@ -22,7 +22,7 @@ Device (GPSW)
Method (_CRS)
{
CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
Add (IO_BASE_ADDRESS, COMMUNITY_OFFSET_GPSOUTHWEST, RBAS)
RBAS = IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPSOUTHWEST
Return (^RBUF)
}
@ -51,7 +51,7 @@ Device (GPNC)
Method (_CRS)
{
CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
Add (IO_BASE_ADDRESS, COMMUNITY_OFFSET_GPNORTH, RBAS)
RBAS = IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPNORTH
Return (^RBUF)
}
@ -80,7 +80,7 @@ Device (GPEC)
Method (_CRS)
{
CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
Add (IO_BASE_ADDRESS, COMMUNITY_OFFSET_GPEAST, RBAS)
RBAS = IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPEAST
Return (^RBUF)
}
@ -109,7 +109,7 @@ Device (GPSE)
Method (_CRS)
{
CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
Add (IO_BASE_ADDRESS, COMMUNITY_OFFSET_GPSOUTHEAST, RBAS)
RBAS = IO_BASE_ADDRESS + COMMUNITY_OFFSET_GPSOUTHEAST
Return (^RBUF)
}

2
src/soc/intel/braswell/acpi/lpc.asl
View File

@ -39,7 +39,7 @@ Device (LPCB)
CreateDwordField (^RBUF, ^FBAR._LEN, FLEN)
Multiply(CONFIG_COREBOOT_ROMSIZE_KB, 1024, Local0)
Store(Local0, FLEN)
Add(Subtract(0xffffffff, Local0), 1, FBAS)
FBAS = Subtract(0xffffffff, Local0) + 1
Return (^RBUF)
}
}

2
src/soc/intel/braswell/acpi/southcluster.asl
View File

@ -175,7 +175,7 @@ Method (_CRS, 0, Serialized)
/* TOLM is BMBOUND accessible from IOSF so is saved in NVS */
Store (\TOLM, PMIN)
Store (Subtract(CONFIG_ECAM_MMCONF_BASE_ADDRESS, 1), PMAX)
Add (Subtract (PMAX, PMIN), 1, PLEN)
PLEN = Subtract (PMAX, PMIN) + 1
Return (MCRS)
}