GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

src/soc/intel/apollolake/cpu.c: Set up local APIC 

Some Apollo Lake mainboards use SeaBIOS as payload. SeaBIOS requires the
initialization of the programmable interrupt controller (PIC) for
faultless operation. The PIC mode is need for USB support (e.g.
keyboard, memory stick) and for some Option ROMs (e.g. PXE ROM).
Therefore add setup_lapic() to configure the APIC.

Change-Id: I00b339ce1850729023db74da7f8845927a95dcc6
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31802
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Mario Scheithauer 2019-03-07 09:48:33 +01:00 committed by Nico Huber
parent be11236a4d
commit e4cb23c682
1 changed files with 5 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/soc/intel/apollolake/cpu.c
View File

@ -2,7 +2,7 @@
* This file is part of the coreboot project. * This file is part of the coreboot project.
* *
* Copyright (C) 2015-2017 Intel Corp. * Copyright (C) 2015-2017 Intel Corp.
* Copyright (C) 2017 Siemens AG, Inc. * Copyright (C) 2017-2019 Siemens AG
* (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.) * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.)
* (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.) * (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.)
* *
@ -23,6 +23,7 @@
#include "chip.h" #include "chip.h"
#include <cpu/cpu.h> #include <cpu/cpu.h>
#include <cpu/x86/cache.h> #include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h> #include <cpu/x86/mp.h>
#include <cpu/intel/microcode.h> #include <cpu/intel/microcode.h>
#include <cpu/intel/turbo.h> #include <cpu/intel/turbo.h>
@ -161,6 +162,9 @@ static void pre_mp_init(void)
} }
x86_setup_mtrrs_with_detect(); x86_setup_mtrrs_with_detect();
x86_mtrr_check(); x86_mtrr_check();
/* Enable the local CPU apics */
setup_lapic();
} }
#if !CONFIG(SOC_INTEL_COMMON_BLOCK_CPU_MPINIT) #if !CONFIG(SOC_INTEL_COMMON_BLOCK_CPU_MPINIT)