soc/intel/skylake: use SPI flash boot_device_rw() for ealy stages
If the boot device is SPI flash use the common one in the early stages. While tweaking the config don't auto select SPI_FLASH as that is handled automatically by the rest of the build system. BUG=chrome-os-partner:56151 Change-Id: Ifd51a80fd008c336233d6e460c354190fcc0ef22 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16202 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -13,6 +13,7 @@ config CPU_SPECIFIC_OPTIONS
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select ARCH_ROMSTAGE_X86_32
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select ARCH_VERSTAGE_X86_32
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select ACPI_NHLT
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select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
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select BOOT_DEVICE_SUPPORTS_WRITES
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select CACHE_MRC_SETTINGS
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select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE
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@ -46,7 +47,6 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_RESET
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select SMM_TSEG
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select SMP
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select SPI_FLASH
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select SSE2
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select SUPPORT_CPU_UCODE_IN_CBFS
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select TSC_CONSTANT_RATE
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