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lib: provide clearer devicetree semantics 

The devicetree data structures have been available in more than just
ramstage and romstage. In order to provide clearer and consistent
semantics two new macros are provided:

1. DEVTREE_EARLY which is true when !ENV_RAMSTAGE
2. DEVTREE_CONST as a replacment for ROMSTAGE_CONST

The ROMSTAGE_CONST attribute is used in the source code to mark
the devicetree data structures as const in early stages even though
it's not just romstage. Therefore, rename the attribute to
DEVTREE_CONST as that's the actual usage. The only place where the
usage was not devicetree related is console_loglevel, but the same
name was used for consistency. Any stage that is not ramstage has
the const C attribute applied when DEVTREE_CONST is used.

Change-Id: Ibd51c2628dc8f68e0896974f7e4e7c8588d333ed
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/19333
Tested-by: build bot (Jenkins)
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Aaron Durbin 2017-04-16 22:05:36 -05:00
parent 4003950881
commit e4d7abc0d4
24 changed files with 90 additions and 81 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
src/device/device_simple.c
View File

@ -24,7 +24,7 @@
#include <device/resource.h> #include <device/resource.h>
/** Linked list of ALL devices */ /** Linked list of ALL devices */
ROMSTAGE_CONST struct device * ROMSTAGE_CONST all_devices = &dev_root; DEVTREE_CONST struct device * DEVTREE_CONST all_devices = &dev_root;
/** /**
* Given a PCI bus and a devfn number, find the device structure. * Given a PCI bus and a devfn number, find the device structure.
@ -33,10 +33,10 @@ ROMSTAGE_CONST struct device * ROMSTAGE_CONST all_devices = &dev_root;
* @param devfn A device/function number. * @param devfn A device/function number.
* @return Pointer to the device structure (if found), 0 otherwise. * @return Pointer to the device structure (if found), 0 otherwise.
*/ */
ROMSTAGE_CONST struct device *dev_find_slot(unsigned int bus, DEVTREE_CONST struct device *dev_find_slot(unsigned int bus,
unsigned int devfn) unsigned int devfn)
{ {
ROMSTAGE_CONST struct device *dev, *result; DEVTREE_CONST struct device *dev, *result;
result = 0; result = 0;
for (dev = all_devices; dev; dev = dev->next) { for (dev = all_devices; dev; dev = dev->next) {
@ -56,10 +56,10 @@ ROMSTAGE_CONST struct device *dev_find_slot(unsigned int bus,
* @param previous_dev A pointer to a PCI device structure. * @param previous_dev A pointer to a PCI device structure.
* @return Pointer to the next device structure (if found), 0 otherwise. * @return Pointer to the next device structure (if found), 0 otherwise.
*/ */
ROMSTAGE_CONST struct device *dev_find_next_pci_device( DEVTREE_CONST struct device *dev_find_next_pci_device(
ROMSTAGE_CONST struct device *previous_dev) DEVTREE_CONST struct device *previous_dev)
{ {
ROMSTAGE_CONST struct device *dev, *result; DEVTREE_CONST struct device *dev, *result;
if (previous_dev == NULL) if (previous_dev == NULL)
previous_dev = all_devices; previous_dev = all_devices;
@ -81,10 +81,10 @@ ROMSTAGE_CONST struct device *dev_find_next_pci_device(
* @param addr A device number. * @param addr A device number.
* @return Pointer to the device structure (if found), 0 otherwise. * @return Pointer to the device structure (if found), 0 otherwise.
*/ */
ROMSTAGE_CONST struct device *dev_find_slot_on_smbus(unsigned int bus, DEVTREE_CONST struct device *dev_find_slot_on_smbus(unsigned int bus,
unsigned int addr) unsigned int addr)
{ {
ROMSTAGE_CONST struct device *dev, *result; DEVTREE_CONST struct device *dev, *result;
result = 0; result = 0;
for (dev = all_devices; dev; dev = dev->next) { for (dev = all_devices; dev; dev = dev->next) {
@ -105,9 +105,9 @@ ROMSTAGE_CONST struct device *dev_find_slot_on_smbus(unsigned int bus,
* @param device Logical device number. * @param device Logical device number.
* @return Pointer to the device structure (if found), 0 otherwise. * @return Pointer to the device structure (if found), 0 otherwise.
*/ */
ROMSTAGE_CONST struct device *dev_find_slot_pnp(u16 port, u16 device) DEVTREE_CONST struct device *dev_find_slot_pnp(u16 port, u16 device)
{ {
ROMSTAGE_CONST struct device *dev; DEVTREE_CONST struct device *dev;
for (dev = all_devices; dev; dev = dev->next) { for (dev = all_devices; dev; dev = dev->next) {
if ((dev->path.type == DEVICE_PATH_PNP) && if ((dev->path.type == DEVICE_PATH_PNP) &&

2
src/drivers/uart/oxpcie_early.c
View File

@ -25,7 +25,7 @@
#include <device/pci_def.h> #include <device/pci_def.h>
static unsigned int oxpcie_present CAR_GLOBAL; static unsigned int oxpcie_present CAR_GLOBAL;
static ROMSTAGE_CONST u32 uart0_base = CONFIG_EARLY_PCI_MMIO_BASE + 0x1000; static DEVTREE_CONST u32 uart0_base = CONFIG_EARLY_PCI_MMIO_BASE + 0x1000;
int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base) int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base)
{ {

32
src/include/device/device.h
View File

@ -84,9 +84,9 @@ static inline void device_noop(struct device *dev) {}
struct bus { struct bus {
ROMSTAGE_CONST struct device *dev; /* This bridge device */ DEVTREE_CONST struct device *dev; /* This bridge device */
ROMSTAGE_CONST struct device *children; /* devices behind this bridge */ DEVTREE_CONST struct device *children; /* devices behind this bridge */
ROMSTAGE_CONST struct bus *next; /* The next bridge on this device */ DEVTREE_CONST struct bus *next; /* The next bridge on this device */
unsigned int bridge_ctrl; /* Bridge control register */ unsigned int bridge_ctrl; /* Bridge control register */
uint16_t bridge_cmd; /* Bridge command register */ uint16_t bridge_cmd; /* Bridge command register */
unsigned char link_num; /* The index of this link */ unsigned char link_num; /* The index of this link */
@ -113,12 +113,12 @@ struct pci_irq_info {
}; };
struct device { struct device {
ROMSTAGE_CONST struct bus *bus; /* bus this device is on, for bridge DEVTREE_CONST struct bus *bus; /* bus this device is on, for bridge
* devices, it is the up stream bus */ * devices, it is the up stream bus */
ROMSTAGE_CONST struct device *sibling; /* next device on this bus */ DEVTREE_CONST struct device *sibling; /* next device on this bus */
ROMSTAGE_CONST struct device *next; /* chain of all devices */ DEVTREE_CONST struct device *next; /* chain of all devices */
struct device_path path; struct device_path path;
unsigned int vendor; unsigned int vendor;
@ -134,26 +134,26 @@ struct device {
u8 command; u8 command;
/* Base registers for this device. I/O, MEM and Expansion ROM */ /* Base registers for this device. I/O, MEM and Expansion ROM */
ROMSTAGE_CONST struct resource *resource_list; DEVTREE_CONST struct resource *resource_list;
/* links are (downstream) buses attached to the device, usually a leaf /* links are (downstream) buses attached to the device, usually a leaf
* device with no children has 0 buses attached and a bridge has 1 bus * device with no children has 0 buses attached and a bridge has 1 bus
*/ */
ROMSTAGE_CONST struct bus *link_list; DEVTREE_CONST struct bus *link_list;
struct device_operations *ops; struct device_operations *ops;
#ifndef __PRE_RAM__ #if !DEVTREE_EARLY
struct chip_operations *chip_ops; struct chip_operations *chip_ops;
const char *name; const char *name;
#endif #endif
ROMSTAGE_CONST void *chip_info; DEVTREE_CONST void *chip_info;
}; };
/** /**
* This is the root of the device tree. The device tree is defined in the * This is the root of the device tree. The device tree is defined in the
* static.c file and is generated by the config tool at compile time. * static.c file and is generated by the config tool at compile time.
*/ */
extern ROMSTAGE_CONST struct device dev_root; extern DEVTREE_CONST struct device dev_root;
#ifndef __SIMPLE_DEVICE__ #ifndef __SIMPLE_DEVICE__
@ -272,13 +272,13 @@ u32 find_pci_tolm(struct bus *bus);
#else /* vv __SIMPLE_DEVICE__ vv */ #else /* vv __SIMPLE_DEVICE__ vv */
ROMSTAGE_CONST struct device *dev_find_slot(unsigned int bus, DEVTREE_CONST struct device *dev_find_slot(unsigned int bus,
unsigned int devfn); unsigned int devfn);
ROMSTAGE_CONST struct device *dev_find_next_pci_device( DEVTREE_CONST struct device *dev_find_next_pci_device(
ROMSTAGE_CONST struct device *previous_dev); DEVTREE_CONST struct device *previous_dev);
ROMSTAGE_CONST struct device *dev_find_slot_on_smbus(unsigned int bus, DEVTREE_CONST struct device *dev_find_slot_on_smbus(unsigned int bus,
unsigned int addr); unsigned int addr);
ROMSTAGE_CONST struct device *dev_find_slot_pnp(u16 port, u16 device); DEVTREE_CONST struct device *dev_find_slot_pnp(u16 port, u16 device);
#endif #endif

2
src/include/device/resource.h
View File

@ -42,7 +42,7 @@ struct resource {
resource_t base; /* Base address of the resource */ resource_t base; /* Base address of the resource */
resource_t size; /* Size of the resource */ resource_t size; /* Size of the resource */
resource_t limit; /* Largest valid value base + size -1 */ resource_t limit; /* Largest valid value base + size -1 */
ROMSTAGE_CONST struct resource *next; /* Next resource in the list */ DEVTREE_CONST struct resource *next; /* Next resource in the list */
unsigned long flags; /* Descriptions of the kind of resource */ unsigned long flags; /* Descriptions of the kind of resource */
unsigned long index; /* Bus specific per device resource id */ unsigned long index; /* Bus specific per device resource id */
unsigned char align; /* Required alignment (log 2) of the resource */ unsigned char align; /* Required alignment (log 2) of the resource */

15
src/include/stddef.h
View File

@ -2,6 +2,7 @@
#define STDDEF_H #define STDDEF_H
#include <commonlib/helpers.h> #include <commonlib/helpers.h>
#include <rules.h>
typedef long ptrdiff_t; typedef long ptrdiff_t;
#ifndef __SIZE_TYPE__ #ifndef __SIZE_TYPE__
@ -21,10 +22,18 @@ typedef unsigned int wint_t;
#define NULL ((void *)0) #define NULL ((void *)0)
#ifdef __PRE_RAM__ /* The devicetree data structures are only mutable in ramstage. All other
#define ROMSTAGE_CONST const stages have a constant devicetree. */
#if !ENV_RAMSTAGE
#define DEVTREE_EARLY 1
#else #else
#define ROMSTAGE_CONST #define DEVTREE_EARLY 0
#endif
#if DEVTREE_EARLY
#define DEVTREE_CONST const
#else
#define DEVTREE_CONST
#endif #endif
/* Work around non-writable data segment in execute-in-place romstage on x86. */ /* Work around non-writable data segment in execute-in-place romstage on x86. */

4
src/mainboard/amd/bettong/BiosCallOuts.c
View File

@ -109,8 +109,8 @@ static AGESA_STATUS board_ReadSpd(UINT32 Func, UINTN Data, VOID *ConfigPtr)
int spdAddress; int spdAddress;
AGESA_READ_SPD_PARAMS *info = ConfigPtr; AGESA_READ_SPD_PARAMS *info = ConfigPtr;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
ROMSTAGE_CONST struct northbridge_amd_pi_00660F01_config *config = dev->chip_info; DEVTREE_CONST struct northbridge_amd_pi_00660F01_config *config = dev->chip_info;
UINT8 spdAddrLookup_rev_F [2][2][4]= { UINT8 spdAddrLookup_rev_F [2][2][4]= {
{ {0xA0, 0xA2}, {0xA4, 0xAC}, }, /* socket 0 - Channel 0 & 1 - 8-bit SPD addresses */ { {0xA0, 0xA2}, {0xA4, 0xAC}, }, /* socket 0 - Channel 0 & 1 - 8-bit SPD addresses */
{ {0x00, 0x00}, {0x00, 0x00}, }, /* socket 1 - Channel 0 & 1 - 8-bit SPD addresses */ { {0x00, 0x00}, {0x00, 0x00}, }, /* socket 1 - Channel 0 & 1 - 8-bit SPD addresses */

4
src/northbridge/amd/agesa/family14/dimmSpd.c
View File

@ -34,11 +34,11 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
{ {
UINT8 spdAddress; UINT8 spdAddress;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
if (dev == NULL) if (dev == NULL)
return AGESA_ERROR; return AGESA_ERROR;
ROMSTAGE_CONST struct northbridge_amd_agesa_family14_config *config = dev->chip_info; DEVTREE_CONST struct northbridge_amd_agesa_family14_config *config = dev->chip_info;
if (config == NULL) if (config == NULL)
return AGESA_ERROR; return AGESA_ERROR;

4
src/northbridge/amd/agesa/family15/dimmSpd.c
View File

@ -34,11 +34,11 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
{ {
UINT8 spdAddress; UINT8 spdAddress;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
if (dev == NULL) if (dev == NULL)
return AGESA_ERROR; return AGESA_ERROR;
ROMSTAGE_CONST struct northbridge_amd_agesa_family15_config *config = dev->chip_info; DEVTREE_CONST struct northbridge_amd_agesa_family15_config *config = dev->chip_info;
if (config == NULL) if (config == NULL)
return AGESA_ERROR; return AGESA_ERROR;

4
src/northbridge/amd/agesa/family15rl/dimmSpd.c
View File

@ -34,11 +34,11 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
{ {
UINT8 spdAddress; UINT8 spdAddress;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
if (dev == NULL) if (dev == NULL)
return AGESA_ERROR; return AGESA_ERROR;
ROMSTAGE_CONST struct northbridge_amd_agesa_family15rl_config *config = dev->chip_info; DEVTREE_CONST struct northbridge_amd_agesa_family15rl_config *config = dev->chip_info;
if (config == NULL) if (config == NULL)
return AGESA_ERROR; return AGESA_ERROR;

4
src/northbridge/amd/agesa/family15tn/dimmSpd.c
View File

@ -33,11 +33,11 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
{ {
UINT8 spdAddress; UINT8 spdAddress;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
if (dev == NULL) if (dev == NULL)
return AGESA_ERROR; return AGESA_ERROR;
ROMSTAGE_CONST struct northbridge_amd_agesa_family15tn_config *config = dev->chip_info; DEVTREE_CONST struct northbridge_amd_agesa_family15tn_config *config = dev->chip_info;
if (config == NULL) if (config == NULL)
return AGESA_ERROR; return AGESA_ERROR;

4
src/northbridge/amd/agesa/family16kb/dimmSpd.c
View File

@ -33,11 +33,11 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
{ {
UINT8 spdAddress; UINT8 spdAddress;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
if (dev == NULL) if (dev == NULL)
return AGESA_ERROR; return AGESA_ERROR;
ROMSTAGE_CONST struct northbridge_amd_agesa_family16kb_config *config = dev->chip_info; DEVTREE_CONST struct northbridge_amd_agesa_family16kb_config *config = dev->chip_info;
if (config == NULL) if (config == NULL)
return AGESA_ERROR; return AGESA_ERROR;

4
src/northbridge/amd/pi/00630F01/dimmSpd.c
View File

@ -29,8 +29,8 @@
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{ {
int spdAddress; int spdAddress;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
ROMSTAGE_CONST struct northbridge_amd_pi_00630F01_config *config = dev->chip_info; DEVTREE_CONST struct northbridge_amd_pi_00630F01_config *config = dev->chip_info;
if ((dev == 0) || (config == 0)) if ((dev == 0) || (config == 0))
return AGESA_ERROR; return AGESA_ERROR;

4
src/northbridge/amd/pi/00660F01/dimmSpd.c
View File

@ -27,8 +27,8 @@
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{ {
int spdAddress; int spdAddress;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
ROMSTAGE_CONST struct northbridge_amd_pi_00660F01_config *config = dev->chip_info; DEVTREE_CONST struct northbridge_amd_pi_00660F01_config *config = dev->chip_info;
if ((dev == 0) || (config == 0)) if ((dev == 0) || (config == 0))
return AGESA_ERROR; return AGESA_ERROR;

4
src/northbridge/amd/pi/00670F00/dimmSpd.c
View File

@ -27,8 +27,8 @@
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{ {
int spdAddress; int spdAddress;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
ROMSTAGE_CONST struct northbridge_amd_pi_00670F00_config *config = dev->chip_info; DEVTREE_CONST struct northbridge_amd_pi_00670F00_config *config = dev->chip_info;
if ((dev == 0) || (config == 0)) if ((dev == 0) || (config == 0))
return AGESA_ERROR; return AGESA_ERROR;

4
src/northbridge/amd/pi/00730F01/dimmSpd.c
View File

@ -29,8 +29,8 @@
AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info) AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PARAMS *info)
{ {
int spdAddress; int spdAddress;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2)); DEVTREE_CONST struct device *dev = dev_find_slot(0, PCI_DEVFN(0x18, 2));
ROMSTAGE_CONST struct northbridge_amd_pi_00730F01_config *config = dev->chip_info; DEVTREE_CONST struct northbridge_amd_pi_00730F01_config *config = dev->chip_info;
if ((dev == 0) || (config == 0)) if ((dev == 0) || (config == 0))
return AGESA_ERROR; return AGESA_ERROR;

4
src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c
View File

@ -55,8 +55,8 @@ typedef struct northbridge_intel_fsp_rangeley_config config_t;
*/ */
static void ConfigureDefaultUpdData(UPD_DATA_REGION *UpdData) static void ConfigureDefaultUpdData(UPD_DATA_REGION *UpdData)
{ {
ROMSTAGE_CONST struct device *dev; DEVTREE_CONST struct device *dev;
ROMSTAGE_CONST config_t *config; DEVTREE_CONST config_t *config;
printk(BIOS_DEBUG, "Configure Default UPD Data\n"); printk(BIOS_DEBUG, "Configure Default UPD Data\n");
dev = dev_find_slot(0, SOC_DEV_FUNC); dev = dev_find_slot(0, SOC_DEV_FUNC);

4
src/soc/intel/apollolake/i2c_early.c
View File

@ -28,8 +28,8 @@
static int i2c_early_init_bus(unsigned int bus) static int i2c_early_init_bus(unsigned int bus)
{ {
ROMSTAGE_CONST struct soc_intel_apollolake_config *config; DEVTREE_CONST struct soc_intel_apollolake_config *config;
ROMSTAGE_CONST struct device *tree_dev; DEVTREE_CONST struct device *tree_dev;
pci_devfn_t dev; pci_devfn_t dev;
int devfn; int devfn;
uintptr_t base; uintptr_t base;

4
src/soc/intel/apollolake/pmutil.c
View File

@ -502,10 +502,10 @@ void pmc_gpe_init(void)
uint32_t gpio_cfg = 0; uint32_t gpio_cfg = 0;
uint32_t gpio_cfg_reg; uint32_t gpio_cfg_reg;
uint8_t dw1, dw2, dw3; uint8_t dw1, dw2, dw3;
ROMSTAGE_CONST struct soc_intel_apollolake_config *config; DEVTREE_CONST struct soc_intel_apollolake_config *config;
/* Look up the device in devicetree */ /* Look up the device in devicetree */
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, SA_DEVFN_ROOT); DEVTREE_CONST struct device *dev = dev_find_slot(0, SA_DEVFN_ROOT);
if (!dev || !dev->chip_info) { if (!dev || !dev->chip_info) {
printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n"); printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
return; return;

6
src/soc/intel/common/block/gspi/gspi.c
View File

@ -107,13 +107,13 @@
#if defined(__SIMPLE_DEVICE__) #if defined(__SIMPLE_DEVICE__)
static uintptr_t gspi_get_base_addr(int devfn, static uintptr_t gspi_get_base_addr(int devfn,
ROMSTAGE_CONST struct device *dev) DEVTREE_CONST struct device *dev)
{ {
pci_devfn_t pci_dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)); pci_devfn_t pci_dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn));
return ALIGN_DOWN(pci_read_config32(pci_dev, PCI_BASE_ADDRESS_0), 16); return ALIGN_DOWN(pci_read_config32(pci_dev, PCI_BASE_ADDRESS_0), 16);
} }
static void gspi_set_base_addr(int devfn, ROMSTAGE_CONST struct device *dev, static void gspi_set_base_addr(int devfn, DEVTREE_CONST struct device *dev,
uintptr_t base) uintptr_t base)
{ {
pci_devfn_t pci_dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)); pci_devfn_t pci_dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn));
@ -172,7 +172,7 @@ static void gspi_set_base_addr(int devfn, struct device *dev, uintptr_t base)
static uintptr_t gspi_calc_base_addr(unsigned int gspi_bus) static uintptr_t gspi_calc_base_addr(unsigned int gspi_bus)
{ {
uintptr_t bus_base, gspi_base_addr; uintptr_t bus_base, gspi_base_addr;
ROMSTAGE_CONST struct device *dev; DEVTREE_CONST struct device *dev;
int devfn = gspi_soc_bus_to_devfn(gspi_bus); int devfn = gspi_soc_bus_to_devfn(gspi_bus);
if (devfn < 0) if (devfn < 0)

4
src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
View File

@ -82,8 +82,8 @@ static const char *emmc_mode_strings[] = {
*/ */
static void ConfigureDefaultUpdData(FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *UpdData) static void ConfigureDefaultUpdData(FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *UpdData)
{ {
ROMSTAGE_CONST struct device *dev; DEVTREE_CONST struct device *dev;
ROMSTAGE_CONST config_t *config; DEVTREE_CONST config_t *config;
printk(FSP_INFO_LEVEL, "Configure Default UPD Data\n"); printk(FSP_INFO_LEVEL, "Configure Default UPD Data\n");
dev = dev_find_slot(0, SOC_DEV_FUNC); dev = dev_find_slot(0, SOC_DEV_FUNC);

4
src/soc/intel/skylake/bootblock/i2c.c
View File

@ -44,8 +44,8 @@ uintptr_t lpss_i2c_base_address(unsigned int bus)
static void i2c_early_init_bus(unsigned int bus) static void i2c_early_init_bus(unsigned int bus)
{ {
ROMSTAGE_CONST struct soc_intel_skylake_config *config; DEVTREE_CONST struct soc_intel_skylake_config *config;
ROMSTAGE_CONST struct device *tree_dev; DEVTREE_CONST struct device *tree_dev;
pci_devfn_t dev; pci_devfn_t dev;
int devfn; int devfn;
uintptr_t base; uintptr_t base;

4
src/soc/intel/skylake/gspi.c
View File

@ -22,9 +22,9 @@
const struct gspi_cfg *gspi_get_soc_cfg(void) const struct gspi_cfg *gspi_get_soc_cfg(void)
{ {
ROMSTAGE_CONST struct soc_intel_skylake_config *config; DEVTREE_CONST struct soc_intel_skylake_config *config;
int devfn = SA_DEVFN_ROOT; int devfn = SA_DEVFN_ROOT;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, devfn); DEVTREE_CONST struct device *dev = dev_find_slot(0, devfn);
if (!dev || !dev->chip_info) { if (!dev || !dev->chip_info) {
printk(BIOS_ERR, "%s: Could not find SoC devicetree config!\n", printk(BIOS_ERR, "%s: Could not find SoC devicetree config!\n",

4
src/soc/intel/skylake/pmutil.c
View File

@ -484,8 +484,8 @@ void poweroff(void)
void pmc_gpe_init(void) void pmc_gpe_init(void)
{ {
ROMSTAGE_CONST struct soc_intel_skylake_config *config; DEVTREE_CONST struct soc_intel_skylake_config *config;
ROMSTAGE_CONST struct device *dev = dev_find_slot(0, PCH_DEVFN_PMC); DEVTREE_CONST struct device *dev = dev_find_slot(0, PCH_DEVFN_PMC);
uint8_t *pmc_regs; uint8_t *pmc_regs;
uint32_t gpio_cfg; uint32_t gpio_cfg;
uint32_t gpio_cfg_reg; uint32_t gpio_cfg_reg;

26
util/sconfig/main.c
View File

@ -407,18 +407,18 @@ void add_ioapic_info(struct device *dev, int apicid, const char *_srcpin,
static void pass0(FILE * fil, struct device *ptr) static void pass0(FILE * fil, struct device *ptr)
{ {
if (ptr->type == device && ptr->id == 0) if (ptr->type == device && ptr->id == 0)
fprintf(fil, "ROMSTAGE_CONST struct bus %s_links[];\n", fprintf(fil, "DEVTREE_CONST struct bus %s_links[];\n",
ptr->name); ptr->name);
if ((ptr->type == device) && (ptr->id != 0) && (!ptr->used)) { if ((ptr->type == device) && (ptr->id != 0) && (!ptr->used)) {
fprintf(fil, "ROMSTAGE_CONST static struct device %s;\n", fprintf(fil, "DEVTREE_CONST static struct device %s;\n",
ptr->name); ptr->name);
if (ptr->rescnt > 0) if (ptr->rescnt > 0)
fprintf(fil, fprintf(fil,
"ROMSTAGE_CONST struct resource %s_res[];\n", "DEVTREE_CONST struct resource %s_res[];\n",
ptr->name); ptr->name);
if (ptr->children || ptr->multidev) if (ptr->children || ptr->multidev)
fprintf(fil, "ROMSTAGE_CONST struct bus %s_links[];\n", fprintf(fil, "DEVTREE_CONST struct bus %s_links[];\n",
ptr->name); ptr->name);
} }
} }
@ -429,9 +429,9 @@ static void pass1(FILE * fil, struct device *ptr)
if (!ptr->used && (ptr->type == device)) { if (!ptr->used && (ptr->type == device)) {
if (ptr->id != 0) if (ptr->id != 0)
fprintf(fil, "static "); fprintf(fil, "static ");
fprintf(fil, "ROMSTAGE_CONST struct device %s = {\n", fprintf(fil, "DEVTREE_CONST struct device %s = {\n",
ptr->name); ptr->name);
fprintf(fil, "#ifndef __PRE_RAM__\n"); fprintf(fil, "#if !DEVTREE_EARLY\n");
fprintf(fil, "\t.ops = %s,\n", (ptr->ops) ? (ptr->ops) : "0"); fprintf(fil, "\t.ops = %s,\n", (ptr->ops) ? (ptr->ops) : "0");
fprintf(fil, "#endif\n"); fprintf(fil, "#endif\n");
fprintf(fil, "\t.bus = &%s_links[%d],\n", ptr->bus->name, fprintf(fil, "\t.bus = &%s_links[%d],\n", ptr->bus->name,
@ -470,7 +470,7 @@ static void pass1(FILE * fil, struct device *ptr)
fprintf(fil, "\t.link_list = NULL,\n"); fprintf(fil, "\t.link_list = NULL,\n");
if (ptr->sibling) if (ptr->sibling)
fprintf(fil, "\t.sibling = &%s,\n", ptr->sibling->name); fprintf(fil, "\t.sibling = &%s,\n", ptr->sibling->name);
fprintf(fil, "#ifndef __PRE_RAM__\n"); fprintf(fil, "#if !DEVTREE_EARLY\n");
fprintf(fil, "\t.chip_ops = &%s_ops,\n", fprintf(fil, "\t.chip_ops = &%s_ops,\n",
ptr->chip->name_underscore); ptr->chip->name_underscore);
if (ptr->chip->chip == &mainboard) if (ptr->chip->chip == &mainboard)
@ -485,7 +485,7 @@ static void pass1(FILE * fil, struct device *ptr)
} }
if (ptr->rescnt > 0) { if (ptr->rescnt > 0) {
int i = 1; int i = 1;
fprintf(fil, "ROMSTAGE_CONST struct resource %s_res[] = {\n", fprintf(fil, "DEVTREE_CONST struct resource %s_res[] = {\n",
ptr->name); ptr->name);
struct resource *r = ptr->res; struct resource *r = ptr->res;
while (r) { while (r) {
@ -510,7 +510,7 @@ static void pass1(FILE * fil, struct device *ptr)
} }
if (!ptr->used && ptr->type == device if (!ptr->used && ptr->type == device
&& (ptr->children || ptr->multidev)) { && (ptr->children || ptr->multidev)) {
fprintf(fil, "ROMSTAGE_CONST struct bus %s_links[] = {\n", fprintf(fil, "DEVTREE_CONST struct bus %s_links[] = {\n",
ptr->name); ptr->name);
if (ptr->multidev) { if (ptr->multidev) {
struct device *d = ptr; struct device *d = ptr;
@ -554,7 +554,7 @@ static void pass1(FILE * fil, struct device *ptr)
if ((ptr->type == chip) && (ptr->chiph_exists)) { if ((ptr->type == chip) && (ptr->chiph_exists)) {
if (ptr->reg) { if (ptr->reg) {
fprintf(fil, fprintf(fil,
"ROMSTAGE_CONST struct %s_config %s_info_%d = {\n", "DEVTREE_CONST struct %s_config %s_info_%d = {\n",
ptr->name_underscore, ptr->name_underscore, ptr->name_underscore, ptr->name_underscore,
ptr->id); ptr->id);
struct reg *r = ptr->reg; struct reg *r = ptr->reg;
@ -565,7 +565,7 @@ static void pass1(FILE * fil, struct device *ptr)
fprintf(fil, "};\n\n"); fprintf(fil, "};\n\n");
} else { } else {
fprintf(fil, fprintf(fil,
"ROMSTAGE_CONST struct %s_config %s_info_%d = { };\n", "DEVTREE_CONST struct %s_config %s_info_%d = { };\n",
ptr->name_underscore, ptr->name_underscore, ptr->name_underscore, ptr->name_underscore,
ptr->id); ptr->id);
} }
@ -665,7 +665,7 @@ int main(int argc, char **argv)
if (h->chiph_exists) if (h->chiph_exists)
fprintf(autogen, "#include \"%s/chip.h\"\n", h->name); fprintf(autogen, "#include \"%s/chip.h\"\n", h->name);
} }
fprintf(autogen, "\n#ifndef __PRE_RAM__\n"); fprintf(autogen, "\n#if !DEVTREE_EARLY\n");
fprintf(autogen, fprintf(autogen,
"__attribute__((weak)) struct chip_operations mainboard_ops = {};\n"); "__attribute__((weak)) struct chip_operations mainboard_ops = {};\n");
h = &headers; h = &headers;
@ -683,7 +683,7 @@ int main(int argc, char **argv)
fprintf(autogen, "\n/* pass 0 */\n"); fprintf(autogen, "\n/* pass 0 */\n");
walk_device_tree(autogen, &root, pass0, NULL); walk_device_tree(autogen, &root, pass0, NULL);
fprintf(autogen, "\n/* pass 1 */\n" fprintf(autogen, "\n/* pass 1 */\n"
"ROMSTAGE_CONST struct device * ROMSTAGE_CONST last_dev = &%s;\n", "DEVTREE_CONST struct device * DEVTREE_CONST last_dev = &%s;\n",
lastdev->name); lastdev->name);
walk_device_tree(autogen, &root, pass1, NULL); walk_device_tree(autogen, &root, pass1, NULL);