soc/amd{common,cezanne}: Move pcie_gpp.c to common

Cezanne and Picasso can now use the same driver.

BUG=b:184766519
TEST=Boot guybrush and dump ASL. Verified it didn't change.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ie4ede82935d6c69b323c1fdceaa61e306aa2820a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54026
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>

src/soc/amd/cezanne/Kconfig

@@ -50,6 +50,7 @@ config SOC_SPECIFIC_OPTIONS
 	select SOC_AMD_COMMON_BLOCK_NONCAR
 	select SOC_AMD_COMMON_BLOCK_PCI
 	select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
+	select SOC_AMD_COMMON_BLOCK_PCIE_GPP_DRIVER
 	select SOC_AMD_COMMON_BLOCK_PM
 	select SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE
 	select SOC_AMD_COMMON_BLOCK_PSP_GEN2

src/soc/amd/cezanne/Makefile.inc

@@ -39,7 +39,6 @@ ramstage-y	+= data_fabric.c
 ramstage-y	+= fch.c
 ramstage-y	+= fsp_s_params.c
 ramstage-y	+= gpio.c
-ramstage-y	+= pcie_gpp.c
 ramstage-y	+= reset.c
 ramstage-y	+= root_complex.c
 ramstage-y	+= uart.c

src/soc/amd/common/block/pci/Kconfig

@@ -10,3 +10,9 @@ config SOC_AMD_COMMON_BLOCK_PCI_MMCONF
 	help
 	  Selecting this option adds the AMD-common enable_pci_mmconf function
 	  to the build.
+
+config SOC_AMD_COMMON_BLOCK_PCIE_GPP_DRIVER
+	bool
+	depends on SOC_AMD_COMMON_BLOCK_PCI
+	help
+	  Select this option to use AMD common PCIe GPP driver.

src/soc/amd/common/block/pci/Makefile.inc

@@ -3,6 +3,7 @@ ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PCI),y)
 ramstage-y += amd_pci_util.c
 ramstage-y += pci_routing_info.c
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi_prt.c
+ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PCIE_GPP_DRIVER) += pcie_gpp.c
 
 endif # CONFIG_SOC_AMD_COMMON_BLOCK_PCI