soc/intel/common: Move SGX supported API to cpulib

Move is_sgx_supported() API to common cpulib code, so that
this function can be used by other code without enabling
SOC_INTEL_COMMON_BLOCK_SGX_ENABLE config option.

Change-Id: Ib630ac451152ae2471c862fced992dde3b49d05d
Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71116
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
This commit is contained in:
Pratikkumar Prajapati 2022-12-19 10:13:09 -08:00 committed by Sridhar Siricilla
parent 9693bcb4c4
commit e51978f26f
4 changed files with 16 additions and 15 deletions

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@ -523,3 +523,13 @@ unsigned int smbios_cpu_get_max_speed_mhz(void)
{ {
return cpu_get_max_turbo_ratio() * CONFIG_CPU_BCLK_MHZ; return cpu_get_max_turbo_ratio() * CONFIG_CPU_BCLK_MHZ;
} }
bool is_sgx_supported(void)
{
struct cpuid_result cpuid_regs;
msr_t msr;
cpuid_regs = cpuid_ext(0x7, 0x0); /* EBX[2] is feature capability */
msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */
return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR));
}

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@ -211,4 +211,10 @@ bool is_tme_supported(void);
*/ */
void set_tme_core_activate(void); void set_tme_core_activate(void);
/*
* This function checks if the CPU supports SGX feature.
* Returns true if SGX feature is supported otherwise false.
*/
bool is_sgx_supported(void);
#endif /* SOC_INTEL_COMMON_BLOCK_CPULIB_H */ #endif /* SOC_INTEL_COMMON_BLOCK_CPULIB_H */

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@ -5,11 +5,6 @@
#include <soc/nvs.h> #include <soc/nvs.h>
/*
* Check if SGX is supported
*/
int is_sgx_supported(void);
/* /*
* Configure core PRMRR. * Configure core PRMRR.
* PRMRR needs to configured first on all cores and then * PRMRR needs to configured first on all cores and then

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@ -12,16 +12,6 @@
#include <soc/cpu.h> #include <soc/cpu.h>
#include <soc/pci_devs.h> #include <soc/pci_devs.h>
int is_sgx_supported(void)
{
struct cpuid_result cpuid_regs;
msr_t msr;
cpuid_regs = cpuid_ext(0x7, 0x0); /* EBX[2] is feature capability */
msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */
return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR));
}
void prmrr_core_configure(void) void prmrr_core_configure(void)
{ {
msr_t prmrr_base, prmrr_mask; msr_t prmrr_base, prmrr_mask;