sb/amd/cimx/sb900: Get rid of device_t
Use of device_t has been abandoned in ramstage. Change-Id: Id634edd7005db85690cdc93579c1f97588ffc5f8 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26416 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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@ -14,7 +14,7 @@
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*/
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*/
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#include <device/device.h> /* device_t */
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#include <device/device.h>
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#include <device/pci.h> /* device_operations */
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#include <device/pci.h> /* device_operations */
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#include <device/pci_ids.h>
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#include <device/pci_ids.h>
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#include <device/smbus.h> /* smbus_bus_operations */
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#include <device/smbus.h> /* smbus_bus_operations */
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@ -73,7 +73,7 @@ static struct pci_operations lops_pci = {
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.set_subsystem = 0,
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.set_subsystem = 0,
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};
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};
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static void lpc_enable_resources(device_t dev)
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static void lpc_enable_resources(struct device *dev)
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{
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{
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printk(BIOS_DEBUG, "SB900 - Late.c - lpc_enable_resources - Start.\n");
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printk(BIOS_DEBUG, "SB900 - Late.c - lpc_enable_resources - Start.\n");
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@ -82,7 +82,7 @@ static void lpc_enable_resources(device_t dev)
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printk(BIOS_DEBUG, "SB900 - Late.c - lpc_enable_resources - End.\n");
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printk(BIOS_DEBUG, "SB900 - Late.c - lpc_enable_resources - End.\n");
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}
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}
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static void lpc_init(device_t dev)
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static void lpc_init(struct device *dev)
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{
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{
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printk(BIOS_DEBUG, "SB900 - Late.c - lpc_init - Start.\n");
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printk(BIOS_DEBUG, "SB900 - Late.c - lpc_init - Start.\n");
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/* SB Configure HPET base and enable bit */
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/* SB Configure HPET base and enable bit */
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@ -266,7 +266,7 @@ static const struct pci_driver gec_driver __pci_driver = {
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};
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};
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static void pcie_init(device_t dev)
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static void pcie_init(struct device *dev)
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{
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{
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printk(BIOS_DEBUG, "SB900 - Late.c - pcie_init - Start.\n");
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printk(BIOS_DEBUG, "SB900 - Late.c - pcie_init - Start.\n");
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//- sbPcieGppLateInit(sb_config);
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//- sbPcieGppLateInit(sb_config);
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@ -333,7 +333,7 @@ static const struct pci_driver PORTD_driver __pci_driver = {
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/**
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/**
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* @brief SB Cimx entry point sbBeforePciInit wrapper
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* @brief SB Cimx entry point sbBeforePciInit wrapper
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*/
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*/
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static void sb900_enable(device_t dev)
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static void sb900_enable(struct device *dev)
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{
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{
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u8 gpp_port = 0;
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u8 gpp_port = 0;
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struct southbridge_amd_cimx_sb900_config *sb_chip =
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struct southbridge_amd_cimx_sb900_config *sb_chip =
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@ -19,7 +19,7 @@
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#include <arch/ioapic.h>
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#include <arch/ioapic.h>
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void lpc_read_resources(device_t dev)
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void lpc_read_resources(struct device *dev)
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{
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{
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struct resource *res;
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struct resource *res;
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@ -73,7 +73,7 @@ void lpc_set_resources(struct device *dev)
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* @param dev the device whose children's resources are to be enabled
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* @param dev the device whose children's resources are to be enabled
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*
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*
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*/
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*/
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void lpc_enable_childrens_resources(device_t dev)
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void lpc_enable_childrens_resources(struct device *dev)
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{
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{
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struct bus *link;
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struct bus *link;
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u32 reg, reg_x;
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u32 reg, reg_x;
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@ -85,7 +85,7 @@ void lpc_enable_childrens_resources(device_t dev)
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reg_x = pci_read_config32(dev, 0x48);
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reg_x = pci_read_config32(dev, 0x48);
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for (link = dev->link_list; link; link = link->next) {
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for (link = dev->link_list; link; link = link->next) {
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device_t child;
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struct device *child;
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for (child = link->children; child;
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for (child = link->children; child;
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child = child->sibling) {
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child = child->sibling) {
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if (child->enabled
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if (child->enabled
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@ -20,8 +20,8 @@
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#define SPI_ROM_ENABLE 0x02
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#define SPI_ROM_ENABLE 0x02
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#define SPI_BASE_ADDRESS 0xFEC10000
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#define SPI_BASE_ADDRESS 0xFEC10000
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void lpc_read_resources(device_t dev);
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void lpc_read_resources(struct device *dev);
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void lpc_set_resources(device_t dev);
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void lpc_set_resources(struct device *dev);
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void lpc_enable_childrens_resources(device_t dev);
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void lpc_enable_childrens_resources(struct device *dev);
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#endif
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#endif
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