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sb/intel/lynxpoint/acpi: Clean up cosmetics 

Use ASL 2.0 syntax where possible and uniformize code style to match the
IASL disassembly. Some `Store` in gpio.asl change the binary if touched.
Also remove outdated comment and remove `LynxPoint` from `serialio.asl`.

Tested with BUILD_TIMELESS=1, Google Panther does not change.

Change-Id: Ie0994fa546ff54ebb533afcc6205efb36da99a67
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46777
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-10-25 20:53:29 +01:00 committed by Michael Niewöhner
parent 3614270a76
commit e53dfe0cfb
7 changed files with 243 additions and 258 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/southbridge/intel/lynxpoint/acpi/audio.asl
View File

@ -8,8 +8,8 @@ Device (HDEF)
{ {
Name (_ADR, 0x001b0000) Name (_ADR, 0x001b0000)
Name (PRWH, Package(){ 0x0d, 3 }) // LPT-H Name (PRWH, Package (){ 0x0d, 3 }) // LPT-H
Name (PRWL, Package(){ 0x6d, 3 }) // LPT-LP Name (PRWL, Package (){ 0x6d, 3 }) // LPT-LP
Method (_PRW, 0) { // Power Resources for Wake Method (_PRW, 0) { // Power Resources for Wake
If (\ISLP ()) { If (\ISLP ()) {

44
src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
View File

@ -11,7 +11,7 @@ Name (\PICM, 0) // IOAPIC/8259
* we have to fix it up in coreboot's ACPI creation phase. * we have to fix it up in coreboot's ACPI creation phase.
*/ */
External(NVSA) External (NVSA)
OperationRegion (GNVS, SystemMemory, NVSA, 0xf00) OperationRegion (GNVS, SystemMemory, NVSA, 0xf00)
Field (GNVS, ByteAcc, NoLock, Preserve) Field (GNVS, ByteAcc, NoLock, Preserve)
{ {
@ -112,41 +112,41 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
/* Set flag to enable USB charging in S3 */ /* Set flag to enable USB charging in S3 */
Method (S3UE) Method (S3UE)
{ {
Store (One, \S3U0) \S3U0 = 1
Store (One, \S3U1) \S3U1 = 1
} }
/* Set flag to disable USB charging in S3 */ /* Set flag to disable USB charging in S3 */
Method (S3UD) Method (S3UD)
{ {
Store (Zero, \S3U0) \S3U0 = 0
Store (Zero, \S3U1) \S3U1 = 0
} }
/* Set flag to enable USB charging in S5 */ /* Set flag to enable USB charging in S5 */
Method (S5UE) Method (S5UE)
{ {
Store (One, \S5U0) \S5U0 = 1
Store (One, \S5U1) \S5U1 = 1
} }
/* Set flag to disable USB charging in S5 */ /* Set flag to disable USB charging in S5 */
Method (S5UD) Method (S5UD)
{ {
Store (Zero, \S5U0) \S5U0 = 0
Store (Zero, \S5U1) \S5U1 = 0
} }
/* Set flag to enable 3G module in S3 */ /* Set flag to enable 3G module in S3 */
Method (S3GE) Method (S3GE)
{ {
Store (One, \S33G) \S33G = 1
} }
/* Set flag to disable 3G module in S3 */ /* Set flag to disable 3G module in S3 */
Method (S3GD) Method (S3GD)
{ {
Store (Zero, \S33G) \S33G = 0
} }
External (\_TZ.SKIN) External (\_TZ.SKIN)
@ -169,46 +169,46 @@ Method (TZUP)
/* Update Fan 0 thresholds */ /* Update Fan 0 thresholds */
Method (F0UT, 2) Method (F0UT, 2)
{ {
Store (Arg0, \F0OF) \F0OF = Arg0
Store (Arg1, \F0ON) \F0ON = Arg1
TZUP () TZUP ()
} }
/* Update Fan 1 thresholds */ /* Update Fan 1 thresholds */
Method (F1UT, 2) Method (F1UT, 2)
{ {
Store (Arg0, \F1OF) \F1OF = Arg0
Store (Arg1, \F1ON) \F1ON = Arg1
TZUP () TZUP ()
} }
/* Update Fan 2 thresholds */ /* Update Fan 2 thresholds */
Method (F2UT, 2) Method (F2UT, 2)
{ {
Store (Arg0, \F2OF) \F2OF = Arg0
Store (Arg1, \F2ON) \F2ON = Arg1
TZUP () TZUP ()
} }
/* Update Fan 3 thresholds */ /* Update Fan 3 thresholds */
Method (F3UT, 2) Method (F3UT, 2)
{ {
Store (Arg0, \F3OF) \F3OF = Arg0
Store (Arg1, \F3ON) \F3ON = Arg1
TZUP () TZUP ()
} }
/* Update Fan 4 thresholds */ /* Update Fan 4 thresholds */
Method (F4UT, 2) Method (F4UT, 2)
{ {
Store (Arg0, \F4OF) \F4OF = Arg0
Store (Arg1, \F4ON) \F4ON = Arg1
TZUP () TZUP ()
} }
/* Update Temperature Sensor ID */ /* Update Temperature Sensor ID */
Method (TMPU, 1) Method (TMPU, 1)
{ {
Store (Arg0, \TMPS) \TMPS = Arg0
TZUP () TZUP ()
} }

27
src/southbridge/intel/lynxpoint/acpi/gpio.asl
View File

@ -7,7 +7,7 @@ Device (GPIO)
Name (_CID, "INT33C7") Name (_CID, "INT33C7")
Name (_UID, 1) Name (_UID, 1)
Name (RBUF, ResourceTemplate() Name (RBUF, ResourceTemplate ()
{ {
DWordIo (ResourceProducer, DWordIo (ResourceProducer,
MinFixed, // IsMinFixed MinFixed, // IsMinFixed
@ -33,10 +33,9 @@ Device (GPIO)
CreateDwordField (^RBUF, ^BAR0._MAX, BMAX) CreateDwordField (^RBUF, ^BAR0._MAX, BMAX)
CreateDwordField (^RBUF, ^BAR0._LEN, BLEN) CreateDwordField (^RBUF, ^BAR0._LEN, BLEN)
Store (DEFAULT_GPIOSIZE, BLEN) BLEN = DEFAULT_GPIOSIZE
Store (DEFAULT_GPIOBASE, BMIN) BMIN = DEFAULT_GPIOBASE
Store (Subtract (Add (DEFAULT_GPIOBASE, BMAX = DEFAULT_GPIOBASE + DEFAULT_GPIOSIZE - 1
DEFAULT_GPIOSIZE), 1), BMAX)
Return (RBUF) Return (RBUF)
} }
@ -51,7 +50,7 @@ Device (GPIO)
Method (GWAK, 1, NotSerialized) Method (GWAK, 1, NotSerialized)
{ {
// Local0 = GPIO Base Address // Local0 = GPIO Base Address
Store (And (GPBS, Not(0x1)), Local0) Store (GPBS & ~1, Local0)
// Local1 = BANK, Local2 = OFFSET // Local1 = BANK, Local2 = OFFSET
Divide (Arg0, 32, Local2, Local1) Divide (Arg0, 32, Local2, Local1)
@ -61,7 +60,7 @@ Device (GPIO)
// //
// Local3 = GPIOBASE + GPIO_OWN(BANK) // Local3 = GPIOBASE + GPIO_OWN(BANK)
Store (Add (Local0, Multiply (Local1, 0x4)), Local3) Store (Local0 + Local1 * 4, Local3)
// GPIO_OWN(BANK) // GPIO_OWN(BANK)
OperationRegion (IOWN, SystemIO, Local3, 4) OperationRegion (IOWN, SystemIO, Local3, 4)
@ -70,14 +69,14 @@ Device (GPIO)
} }
// GPIO_OWN[GPIO] = 0 (ACPI) // GPIO_OWN[GPIO] = 0 (ACPI)
Store (And (GOWN, Not (ShiftLeft (0x1, Local2))), GOWN) Store (GOWN & ~(1 << Local2), GOWN)
// //
// Set ROUTE to SCI // Set ROUTE to SCI
// //
// Local3 = GPIOBASE + GPIO_ROUTE(BANK) // Local3 = GPIOBASE + GPIO_ROUTE(BANK)
Store (Add (Add (Local0, 0x30), Multiply (Local1, 0x4)), Local3) Store (Local0 + 0x30 + Local1 * 4, Local3)
// GPIO_ROUTE(BANK) // GPIO_ROUTE(BANK)
OperationRegion (IROU, SystemIO, Local3, 4) OperationRegion (IROU, SystemIO, Local3, 4)
@ -86,14 +85,14 @@ Device (GPIO)
} }
// GPIO_ROUTE[GPIO] = 0 (SCI) // GPIO_ROUTE[GPIO] = 0 (SCI)
Store (And (GROU, Not (ShiftLeft (0x1, Local2))), GROU) Store (GROU & ~(1 << Local2), GROU)
// //
// Set GPnCONFIG to GPIO|INPUT|INVERT // Set GPnCONFIG to GPIO|INPUT|INVERT
// //
// Local3 = GPIOBASE + GPnCONFIG0(GPIO) // Local3 = GPIOBASE + GPnCONFIG0(GPIO)
Store (Add (Add (Local0, 0x100), Multiply (Arg0, 0x8)), Local3) Store (Local0 + 0x100 + Arg0 * 8, Local3)
// GPnCONFIG(GPIO) // GPnCONFIG(GPIO)
OperationRegion (GPNC, SystemIO, Local3, 8) OperationRegion (GPNC, SystemIO, Local3, 8)
@ -110,8 +109,8 @@ Device (GPIO)
ISEN, 1, // SENSE: 0=ENABLE 1=DISABLE ISEN, 1, // SENSE: 0=ENABLE 1=DISABLE
} }
Store (0x1, GMOD) // GPIO GMOD = 1 // GPIO
Store (0x1, GIOS) // INPUT GIOS = 1 // INPUT
Store (0x1, GINV) // INVERT GINV = 1 // INVERT
} }
} }

70
src/southbridge/intel/lynxpoint/acpi/lpc.asl
View File

@ -6,7 +6,7 @@ Device (LPCB)
{ {
Name (_ADR, 0x001f0000) Name (_ADR, 0x001f0000)
OperationRegion(LPC0, PCI_Config, 0x00, 0x100) OperationRegion (LPC0, PCI_Config, 0, 0x100)
Field (LPC0, AnyAcc, NoLock, Preserve) Field (LPC0, AnyAcc, NoLock, Preserve)
{ {
Offset (0x02), Offset (0x02),
@ -37,8 +37,8 @@ Device (LPCB)
Device (DMAC) // DMA Controller Device (DMAC) // DMA Controller
{ {
Name (_HID, EISAID("PNP0200")) Name (_HID, EISAID ("PNP0200"))
Name (_CRS, ResourceTemplate() Name (_CRS, ResourceTemplate ()
{ {
IO (Decode16, 0x00, 0x00, 0x01, 0x20) IO (Decode16, 0x00, 0x00, 0x01, 0x20)
IO (Decode16, 0x81, 0x81, 0x01, 0x11) IO (Decode16, 0x81, 0x81, 0x01, 0x11)
@ -50,21 +50,21 @@ Device (LPCB)
Device (FWH) // Firmware Hub Device (FWH) // Firmware Hub
{ {
Name (_HID, EISAID("INT0800")) Name (_HID, EISAID ("INT0800"))
Name (_CRS, ResourceTemplate() Name (_CRS, ResourceTemplate ()
{ {
Memory32Fixed(ReadOnly, 0xff000000, 0x01000000) Memory32Fixed (ReadOnly, 0xff000000, 0x01000000)
}) })
} }
Device (HPET) Device (HPET)
{ {
Name (_HID, EISAID("PNP0103")) Name (_HID, EISAID ("PNP0103"))
Name (_CID, 0x010CD041) Name (_CID, 0x010CD041)
Name (BUF0, ResourceTemplate() Name (BUF0, ResourceTemplate ()
{ {
Memory32Fixed(ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0) Memory32Fixed (ReadOnly, CONFIG_HPET_ADDRESS, 0x400, FED0)
}) })
Method (_STA, 0) // Device Status Method (_STA, 0) // Device Status
@ -72,7 +72,7 @@ Device (LPCB)
If (HPTE) { If (HPTE) {
// Note: Ancient versions of Windows don't want // Note: Ancient versions of Windows don't want
// to see the HPET in order to work right // to see the HPET in order to work right
If (LGreaterEqual(OSYS, 2001)) { If (OSYS >= 2001) {
Return (0xf) // Enable and show device Return (0xf) // Enable and show device
} Else { } Else {
Return (0xb) // Enable and don't show device Return (0xb) // Enable and don't show device
@ -86,16 +86,16 @@ Device (LPCB)
{ {
If (HPTE) { If (HPTE) {
CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0) CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
If (Lequal(HPAS, 1)) { If (HPAS == 1) {
Add(CONFIG_HPET_ADDRESS, 0x1000, HPT0) HPT0 = CONFIG_HPET_ADDRESS + 0x1000
} }
If (Lequal(HPAS, 2)) { If (HPAS == 2) {
Add(CONFIG_HPET_ADDRESS, 0x2000, HPT0) HPT0 = CONFIG_HPET_ADDRESS + 0x2000
} }
If (Lequal(HPAS, 3)) { If (HPAS == 3) {
Add(CONFIG_HPET_ADDRESS, 0x3000, HPT0) HPT0 = CONFIG_HPET_ADDRESS + 0x3000
} }
} }
@ -103,10 +103,10 @@ Device (LPCB)
} }
} }
Device(PIC) // 8259 Interrupt Controller Device (PIC) // 8259 Interrupt Controller
{ {
Name (_HID,EISAID("PNP0000")) Name (_HID,EISAID ("PNP0000"))
Name (_CRS, ResourceTemplate() Name (_CRS, ResourceTemplate ()
{ {
IO (Decode16, 0x20, 0x20, 0x01, 0x02) IO (Decode16, 0x20, 0x20, 0x01, 0x02)
IO (Decode16, 0x24, 0x24, 0x01, 0x02) IO (Decode16, 0x24, 0x24, 0x01, 0x02)
@ -129,22 +129,22 @@ Device (LPCB)
}) })
} }
Device(MATH) // FPU Device (MATH) // FPU
{ {
Name (_HID, EISAID("PNP0C04")) Name (_HID, EISAID ("PNP0C04"))
Name (_CRS, ResourceTemplate() Name (_CRS, ResourceTemplate ()
{ {
IO (Decode16, 0xf0, 0xf0, 0x01, 0x01) IO (Decode16, 0xf0, 0xf0, 0x01, 0x01)
IRQNoFlags() { 13 } IRQNoFlags () { 13 }
}) })
} }
Device(LDRC) // LPC device: Resource consumption Device (LDRC) // LPC device: Resource consumption
{ {
Name (_HID, EISAID("PNP0C02")) Name (_HID, EISAID ("PNP0C02"))
Name (_UID, 2) Name (_UID, 2)
Name (RBUF, ResourceTemplate() Name (RBUF, ResourceTemplate ()
{ {
IO (Decode16, 0x2e, 0x2e, 0x1, 0x02) // First SuperIO IO (Decode16, 0x2e, 0x2e, 0x1, 0x02) // First SuperIO
IO (Decode16, 0x4e, 0x4e, 0x1, 0x02) // Second SuperIO IO (Decode16, 0x4e, 0x4e, 0x1, 0x02) // Second SuperIO
@ -166,15 +166,15 @@ Device (LPCB)
// LynxPoint-LP GPIO resources are defined in the // LynxPoint-LP GPIO resources are defined in the
// SerialIO GPIO device and LynxPoint-H GPIO resources // SerialIO GPIO device and LynxPoint-H GPIO resources
// are defined here. // are defined here.
If (LNot (\ISLP ())) { If (!\ISLP ()) {
CreateByteField (^RBUF, ^GPR1._LEN, R1LN) CreateByteField (^RBUF, ^GPR1._LEN, R1LN)
CreateWordField (^RBUF, ^GPR1._MIN, R1MN) CreateWordField (^RBUF, ^GPR1._MIN, R1MN)
CreateWordField (^RBUF, ^GPR1._MAX, R1MX) CreateWordField (^RBUF, ^GPR1._MAX, R1MX)
// Update GPIO region length // Update GPIO region length
Store (DEFAULT_GPIOBASE, R1MN) R1MN = DEFAULT_GPIOBASE
Store (DEFAULT_GPIOBASE, R1MX) R1MX = DEFAULT_GPIOBASE
Store (DEFAULT_GPIOSIZE, R1LN) R1LN = DEFAULT_GPIOSIZE
} }
Return (RBUF) Return (RBUF)
} }
@ -182,8 +182,8 @@ Device (LPCB)
Device (RTC) // Real Time Clock Device (RTC) // Real Time Clock
{ {
Name (_HID, EISAID("PNP0B00")) Name (_HID, EISAID ("PNP0B00"))
Name (_CRS, ResourceTemplate() Name (_CRS, ResourceTemplate ()
{ {
IO (Decode16, 0x70, 0x70, 1, 8) IO (Decode16, 0x70, 0x70, 1, 8)
}) })
@ -191,11 +191,11 @@ Device (LPCB)
Device (TIMR) // Intel 8254 timer Device (TIMR) // Intel 8254 timer
{ {
Name (_HID, EISAID("PNP0100")) Name (_HID, EISAID ("PNP0100"))
Name (_CRS, ResourceTemplate() { Name (_CRS, ResourceTemplate () {
IO (Decode16, 0x40, 0x40, 0x01, 0x04) IO (Decode16, 0x40, 0x40, 0x01, 0x04)
IO (Decode16, 0x50, 0x50, 0x10, 0x04) IO (Decode16, 0x50, 0x50, 0x10, 0x04)
IRQNoFlags() {0} IRQNoFlags () {0}
}) })
} }

10
src/southbridge/intel/lynxpoint/acpi/pch.asl
View File

@ -22,11 +22,11 @@ Scope (\)
OperationRegion (RCRB, SystemMemory, DEFAULT_RCBA, 0x4000) OperationRegion (RCRB, SystemMemory, DEFAULT_RCBA, 0x4000)
Field (RCRB, DWordAcc, Lock, Preserve) Field (RCRB, DWordAcc, Lock, Preserve)
{ {
Offset(0x3404), // High Performance Timer Configuration Offset (0x3404), // High Performance Timer Configuration
HPAS, 2, // Address Select HPAS, 2, // Address Select
, 5, , 5,
HPTE, 1, // Address Enable HPTE, 1, // Address Enable
Offset(0x3418), // FD (Function Disable) Offset (0x3418), // FD (Function Disable)
, 1, // Reserved , 1, // Reserved
PCID, 1, // PCI bridge disable PCID, 1, // PCI bridge disable
SA1D, 1, // SATA1 disable SA1D, 1, // SATA1 disable
@ -46,7 +46,7 @@ Scope (\)
RP8D, 1, // Root Port 8 disable RP8D, 1, // Root Port 8 disable
TTRD, 1, // Thermal sensor registers disable TTRD, 1, // Thermal sensor registers disable
SA2D, 1, // SATA2 disable SA2D, 1, // SATA2 disable
Offset(0x3428), // FD2 (Function Disable 2) Offset (0x3428), // FD2 (Function Disable 2)
BDFD, 1, // Display BDF BDFD, 1, // Display BDF
ME1D, 1, // ME Interface 1 disable ME1D, 1, // ME Interface 1 disable
ME2D, 1, // ME Interface 2 disable ME2D, 1, // ME Interface 2 disable
@ -81,7 +81,7 @@ Scope (\)
Method (_OSC, 4) Method (_OSC, 4)
{ {
/* Check for proper GUID */ /* Check for proper GUID */
If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) If (Arg0 == ToUUID ("33DB4D5B-1FF7-401C-9657-7441C03DD766"))
{ {
/* Let OS control everything */ /* Let OS control everything */
Return (Arg3) Return (Arg3)
@ -90,7 +90,7 @@ Method (_OSC, 4)
{ {
/* Unrecognized UUID */ /* Unrecognized UUID */
CreateDWordField (Arg3, 0, CDW1) CreateDWordField (Arg3, 0, CDW1)
Or (CDW1, 4, CDW1) CDW1 |= 4
Return (Arg3) Return (Arg3)
} }
} }

166
src/southbridge/intel/lynxpoint/acpi/serialio.asl
View File

@ -1,28 +1,28 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
// Intel LynxPoint Serial IO Devices in ACPI Mode // Intel Serial IO Devices in ACPI Mode
// Serial IO Device BAR0 and BAR1 is 4KB // Serial IO Device BAR0 and BAR1 is 4KB
#define SIO_BAR_LEN 0x1000 #define SIO_BAR_LEN 0x1000
// This is defined in SSDT2 which is generated at boot based // This is defined in SSDT2 which is generated at boot based
// on whether or not the device is enabled in ACPI mode. // on whether or not the device is enabled in ACPI mode.
External(\S0EN) External (\S0EN)
External(\S1EN) External (\S1EN)
External(\S2EN) External (\S2EN)
External(\S3EN) External (\S3EN)
External(\S4EN) External (\S4EN)
External(\S5EN) External (\S5EN)
External(\S6EN) External (\S6EN)
External(\S7EN) External (\S7EN)
// Serial IO Resource Consumption for BAR1 // Serial IO Resource Consumption for BAR1
Device (SIOR) Device (SIOR)
{ {
Name (_HID, EISAID("PNP0C02")) Name (_HID, EISAID ("PNP0C02"))
Name (_UID, 4) Name (_UID, 4)
Name (RBUF, ResourceTemplate() Name (RBUF, ResourceTemplate ()
{ {
// Serial IO BAR1 (PCI config space) resources // Serial IO BAR1 (PCI config space) resources
Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, B1D0) // SDMA Memory32Fixed (ReadWrite, 0x00000000, 0x00000000, B1D0) // SDMA
@ -39,67 +39,67 @@ Device (SIOR)
Method (_CRS, 0, NotSerialized) Method (_CRS, 0, NotSerialized)
{ {
// SDMA // SDMA
If (LNotEqual (\S0B1, Zero)) { If (\S0B1 != 0) {
CreateDwordField (^RBUF, ^B1D0._BAS, B0AD) CreateDwordField (^RBUF, ^B1D0._BAS, B0AD)
CreateDwordField (^RBUF, ^B1D0._LEN, B0LN) CreateDwordField (^RBUF, ^B1D0._LEN, B0LN)
Store (\S0B1, B0AD) B0AD = \S0B1
Store (SIO_BAR_LEN, B0LN) B0LN = SIO_BAR_LEN
} }
// I2C0 // I2C0
If (LNotEqual (\S1B1, Zero)) { If (\S1B1 != 0) {
CreateDwordField (^RBUF, ^B1D1._BAS, B1AD) CreateDwordField (^RBUF, ^B1D1._BAS, B1AD)
CreateDwordField (^RBUF, ^B1D1._LEN, B1LN) CreateDwordField (^RBUF, ^B1D1._LEN, B1LN)
Store (\S1B1, B1AD) B1AD = \S1B1
Store (SIO_BAR_LEN, B1LN) B1LN = SIO_BAR_LEN
} }
// I2C1 // I2C1
If (LNotEqual (\S2B1, Zero)) { If (\S2B1 != 0) {
CreateDwordField (^RBUF, ^B1D2._BAS, B2AD) CreateDwordField (^RBUF, ^B1D2._BAS, B2AD)
CreateDwordField (^RBUF, ^B1D2._LEN, B2LN) CreateDwordField (^RBUF, ^B1D2._LEN, B2LN)
Store (\S2B1, B2AD) B2AD = \S2B1
Store (SIO_BAR_LEN, B2LN) B2LN = SIO_BAR_LEN
} }
// SPI0 // SPI0
If (LNotEqual (\S3B1, Zero)) { If (\S3B1 != 0) {
CreateDwordField (^RBUF, ^B1D3._BAS, B3AD) CreateDwordField (^RBUF, ^B1D3._BAS, B3AD)
CreateDwordField (^RBUF, ^B1D3._LEN, B3LN) CreateDwordField (^RBUF, ^B1D3._LEN, B3LN)
Store (\S3B1, B3AD) B3AD = \S3B1
Store (SIO_BAR_LEN, B3LN) B3LN = SIO_BAR_LEN
} }
// SPI1 // SPI1
If (LNotEqual (\S4B1, Zero)) { If (\S4B1 != 0) {
CreateDwordField (^RBUF, ^B1D4._BAS, B4AD) CreateDwordField (^RBUF, ^B1D4._BAS, B4AD)
CreateDwordField (^RBUF, ^B1D4._LEN, B4LN) CreateDwordField (^RBUF, ^B1D4._LEN, B4LN)
Store (\S4B1, B4AD) B4AD = \S4B1
Store (SIO_BAR_LEN, B4LN) B4LN = SIO_BAR_LEN
} }
// UART0 // UART0
If (LNotEqual (\S5B1, Zero)) { If (\S5B1 != 0) {
CreateDwordField (^RBUF, ^B1D5._BAS, B5AD) CreateDwordField (^RBUF, ^B1D5._BAS, B5AD)
CreateDwordField (^RBUF, ^B1D5._LEN, B5LN) CreateDwordField (^RBUF, ^B1D5._LEN, B5LN)
Store (\S5B1, B5AD) B5AD = \S5B1
Store (SIO_BAR_LEN, B5LN) B5LN = SIO_BAR_LEN
} }
// UART1 // UART1
If (LNotEqual (\S6B1, Zero)) { If (\S6B1 != 0) {
CreateDwordField (^RBUF, ^B1D6._BAS, B6AD) CreateDwordField (^RBUF, ^B1D6._BAS, B6AD)
CreateDwordField (^RBUF, ^B1D6._LEN, B6LN) CreateDwordField (^RBUF, ^B1D6._LEN, B6LN)
Store (\S6B1, B6AD) B6AD = \S6B1
Store (SIO_BAR_LEN, B6LN) B6LN = SIO_BAR_LEN
} }
// SDIO // SDIO
If (LNotEqual (\S7B1, Zero)) { If (\S7B1 != 0) {
CreateDwordField (^RBUF, ^B1D7._BAS, B7AD) CreateDwordField (^RBUF, ^B1D7._BAS, B7AD)
CreateDwordField (^RBUF, ^B1D7._LEN, B7LN) CreateDwordField (^RBUF, ^B1D7._LEN, B7LN)
Store (\S7B1, B7AD) B7AD = \S7B1
Store (SIO_BAR_LEN, B7LN) B7LN = SIO_BAR_LEN
} }
Return (RBUF) Return (RBUF)
@ -122,11 +122,11 @@ Device (SDMA)
Method (_CRS, 0, NotSerialized) Method (_CRS, 0, NotSerialized)
{ {
// Update BAR0 address and length if set in NVS // Update BAR0 address and length if set in NVS
If (LNotEqual (\S0B0, Zero)) { If (\S0B0 != 0) {
CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) CreateDwordField (^RBUF, ^BAR0._BAS, B0AD)
CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) CreateDwordField (^RBUF, ^BAR0._LEN, B0LN)
Store (\S0B0, B0AD) B0AD = \S0B0
Store (SIO_BAR_LEN, B0LN) B0LN = SIO_BAR_LEN
} }
Return (RBUF) Return (RBUF)
@ -134,7 +134,7 @@ Device (SDMA)
Method (_STA, 0, NotSerialized) Method (_STA, 0, NotSerialized)
{ {
If (LEqual (\S0EN, 0)) { If (\S0EN == 0) {
Return (0x0) Return (0x0)
} Else { } Else {
Return (0xF) Return (0xF)
@ -169,15 +169,15 @@ Device (I2C0)
Method (_CRS, 0, NotSerialized) Method (_CRS, 0, NotSerialized)
{ {
// Update BAR0 address and length if set in NVS // Update BAR0 address and length if set in NVS
If (LNotEqual (\S1B0, Zero)) { If (\S1B0 != 0) {
CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) CreateDwordField (^RBUF, ^BAR0._BAS, B0AD)
CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) CreateDwordField (^RBUF, ^BAR0._LEN, B0LN)
Store (\S1B0, B0AD) B0AD = \S1B0
Store (SIO_BAR_LEN, B0LN) B0LN = SIO_BAR_LEN
} }
// Check if Serial IO DMA Controller is enabled // Check if Serial IO DMA Controller is enabled
If (LNotEqual (\_SB.PCI0.SDMA._STA, Zero)) { If (\_SB.PCI0.SDMA._STA != 0) {
Return (ConcatenateResTemplate (RBUF, DBUF)) Return (ConcatenateResTemplate (RBUF, DBUF))
} Else { } Else {
Return (RBUF) Return (RBUF)
@ -186,7 +186,7 @@ Device (I2C0)
Method (_STA, 0, NotSerialized) Method (_STA, 0, NotSerialized)
{ {
If (LEqual (\S1EN, 0)) { If (\S1EN == 0) {
Return (0x0) Return (0x0)
} Else { } Else {
Return (0xF) Return (0xF)
@ -204,21 +204,21 @@ Device (I2C0)
// Put controller in D0 state // Put controller in D0 state
Method (_PS0, 0, Serialized) Method (_PS0, 0, Serialized)
{ {
And (^PSAT, 0xfffffffc, ^PSAT) ^PSAT &= 0xfffffffc
Store (^PSAT, Local0) // Read back after writing Local0 = ^PSAT // Read back after writing
// Use Local0 to avoid iasl warning: Method Local is set but never used // Use Local0 to avoid iasl warning: Method Local is set but never used
And(Local0, Ones, Local0) Local0 &= Ones
} }
// Put controller in D3Hot state // Put controller in D3Hot state
Method (_PS3, 0, Serialized) Method (_PS3, 0, Serialized)
{ {
Or (^PSAT, 0x00000003, ^PSAT) ^PSAT |= 0x00000003
Store (^PSAT, Local0) // Read back after writing Local0 = ^PSAT // Read back after writing
// Use Local0 to avoid iasl warning: Method Local is set but never used // Use Local0 to avoid iasl warning: Method Local is set but never used
And(Local0, Ones, Local0) Local0 &= Ones
} }
} }
@ -249,15 +249,15 @@ Device (I2C1)
Method (_CRS, 0, NotSerialized) Method (_CRS, 0, NotSerialized)
{ {
// Update BAR0 address and length if set in NVS // Update BAR0 address and length if set in NVS
If (LNotEqual (\S2B0, Zero)) { If (\S2B0 != 0) {
CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) CreateDwordField (^RBUF, ^BAR0._BAS, B0AD)
CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) CreateDwordField (^RBUF, ^BAR0._LEN, B0LN)
Store (\S2B0, B0AD) B0AD = \S2B0
Store (SIO_BAR_LEN, B0LN) B0LN = SIO_BAR_LEN
} }
// Check if Serial IO DMA Controller is enabled // Check if Serial IO DMA Controller is enabled
If (LNotEqual (\_SB.PCI0.SDMA._STA, Zero)) { If (\_SB.PCI0.SDMA._STA != 0) {
Return (ConcatenateResTemplate (RBUF, DBUF)) Return (ConcatenateResTemplate (RBUF, DBUF))
} Else { } Else {
Return (RBUF) Return (RBUF)
@ -266,7 +266,7 @@ Device (I2C1)
Method (_STA, 0, NotSerialized) Method (_STA, 0, NotSerialized)
{ {
If (LEqual (\S2EN, 0)) { If (\S2EN == 0) {
Return (0x0) Return (0x0)
} Else { } Else {
Return (0xF) Return (0xF)
@ -284,21 +284,21 @@ Device (I2C1)
// Put controller in D0 state // Put controller in D0 state
Method (_PS0, 0, Serialized) Method (_PS0, 0, Serialized)
{ {
And (^PSAT, 0xfffffffc, ^PSAT) ^PSAT &= 0xfffffffc
Store (^PSAT, Local0) // Read back after writing Local0 = ^PSAT // Read back after writing
// Use Local0 to avoid iasl warning: Method Local is set but never used // Use Local0 to avoid iasl warning: Method Local is set but never used
And(Local0, Ones, Local0) Local0 &= Ones
} }
// Put controller in D3Hot state // Put controller in D3Hot state
Method (_PS3, 0, Serialized) Method (_PS3, 0, Serialized)
{ {
Or (^PSAT, 0x00000003, ^PSAT) ^PSAT |= 0x00000003
Store (^PSAT, Local0) // Read back after writing Local0 = ^PSAT // Read back after writing
// Use Local0 to avoid iasl warning: Method Local is set but never used // Use Local0 to avoid iasl warning: Method Local is set but never used
And(Local0, Ones, Local0) Local0 &= Ones
} }
} }
@ -319,11 +319,11 @@ Device (SPI0)
Method (_CRS, 0, NotSerialized) Method (_CRS, 0, NotSerialized)
{ {
// Update BAR0 address and length if set in NVS // Update BAR0 address and length if set in NVS
If (LNotEqual (\S3B0, Zero)) { If (\S3B0 != 0) {
CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) CreateDwordField (^RBUF, ^BAR0._BAS, B0AD)
CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) CreateDwordField (^RBUF, ^BAR0._LEN, B0LN)
Store (\S3B0, B0AD) B0AD = \S3B0
Store (SIO_BAR_LEN, B0LN) B0LN = SIO_BAR_LEN
} }
Return (RBUF) Return (RBUF)
@ -331,7 +331,7 @@ Device (SPI0)
Method (_STA, 0, NotSerialized) Method (_STA, 0, NotSerialized)
{ {
If (LEqual (\S3EN, 0)) { If (\S3EN == 0) {
Return (0x0) Return (0x0)
} Else { } Else {
Return (0xF) Return (0xF)
@ -363,15 +363,15 @@ Device (SPI1)
Method (_CRS, 0, NotSerialized) Method (_CRS, 0, NotSerialized)
{ {
// Update BAR0 address and length if set in NVS // Update BAR0 address and length if set in NVS
If (LNotEqual (\S4B0, Zero)) { If (\S4B0 != 0) {
CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) CreateDwordField (^RBUF, ^BAR0._BAS, B0AD)
CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) CreateDwordField (^RBUF, ^BAR0._LEN, B0LN)
Store (\S4B0, B0AD) B0AD = \S4B0
Store (SIO_BAR_LEN, B0LN) B0LN = SIO_BAR_LEN
} }
// Check if Serial IO DMA Controller is enabled // Check if Serial IO DMA Controller is enabled
If (LNotEqual (\_SB.PCI0.SDMA._STA, Zero)) { If (\_SB.PCI0.SDMA._STA != 0) {
Return (ConcatenateResTemplate (RBUF, DBUF)) Return (ConcatenateResTemplate (RBUF, DBUF))
} Else { } Else {
Return (RBUF) Return (RBUF)
@ -380,7 +380,7 @@ Device (SPI1)
Method (_STA, 0, NotSerialized) Method (_STA, 0, NotSerialized)
{ {
If (LEqual (\S4EN, 0)) { If (\S4EN == 0) {
Return (0x0) Return (0x0)
} Else { } Else {
Return (0xF) Return (0xF)
@ -412,15 +412,15 @@ Device (UAR0)
Method (_CRS, 0, NotSerialized) Method (_CRS, 0, NotSerialized)
{ {
// Update BAR0 address and length if set in NVS // Update BAR0 address and length if set in NVS
If (LNotEqual (\S5B0, Zero)) { If (\S5B0 != 0) {
CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) CreateDwordField (^RBUF, ^BAR0._BAS, B0AD)
CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) CreateDwordField (^RBUF, ^BAR0._LEN, B0LN)
Store (\S5B0, B0AD) B0AD = \S5B0
Store (SIO_BAR_LEN, B0LN) B0LN = SIO_BAR_LEN
} }
// Check if Serial IO DMA Controller is enabled // Check if Serial IO DMA Controller is enabled
If (LNotEqual (\_SB.PCI0.SDMA._STA, Zero)) { If (\_SB.PCI0.SDMA._STA != 0) {
Return (ConcatenateResTemplate (RBUF, DBUF)) Return (ConcatenateResTemplate (RBUF, DBUF))
} Else { } Else {
Return (RBUF) Return (RBUF)
@ -429,7 +429,7 @@ Device (UAR0)
Method (_STA, 0, NotSerialized) Method (_STA, 0, NotSerialized)
{ {
If (LEqual (\S5EN, 0)) { If (\S5EN == 0) {
Return (0x0) Return (0x0)
} Else { } Else {
Return (0xF) Return (0xF)
@ -454,11 +454,11 @@ Device (UAR1)
Method (_CRS, 0, NotSerialized) Method (_CRS, 0, NotSerialized)
{ {
// Update BAR0 address and length if set in NVS // Update BAR0 address and length if set in NVS
If (LNotEqual (\S6B0, Zero)) { If (\S6B0 != 0) {
CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) CreateDwordField (^RBUF, ^BAR0._BAS, B0AD)
CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) CreateDwordField (^RBUF, ^BAR0._LEN, B0LN)
Store (\S6B0, B0AD) B0AD = \S6B0
Store (SIO_BAR_LEN, B0LN) B0LN = SIO_BAR_LEN
} }
Return (RBUF) Return (RBUF)
@ -466,7 +466,7 @@ Device (UAR1)
Method (_STA, 0, NotSerialized) Method (_STA, 0, NotSerialized)
{ {
If (LEqual (\S6EN, 0)) { If (\S6EN == 0) {
Return (0x0) Return (0x0)
} Else { } Else {
Return (0xF) Return (0xF)
@ -491,11 +491,11 @@ Device (SDIO)
Method (_CRS, 0, NotSerialized) Method (_CRS, 0, NotSerialized)
{ {
// Update BAR0 address and length if set in NVS // Update BAR0 address and length if set in NVS
If (LNotEqual (\S7B0, Zero)) { If (\S7B0 != 0) {
CreateDwordField (^RBUF, ^BAR0._BAS, B0AD) CreateDwordField (^RBUF, ^BAR0._BAS, B0AD)
CreateDwordField (^RBUF, ^BAR0._LEN, B0LN) CreateDwordField (^RBUF, ^BAR0._LEN, B0LN)
Store (\S7B0, B0AD) B0AD = \S7B0
Store (SIO_BAR_LEN, B0LN) B0LN = SIO_BAR_LEN
} }
Return (RBUF) Return (RBUF)
@ -503,7 +503,7 @@ Device (SDIO)
Method (_STA, 0, NotSerialized) Method (_STA, 0, NotSerialized)
{ {
If (LEqual (\S7EN, 0)) { If (\S7EN == 0) {
Return (0x0) Return (0x0)
} Else { } Else {
Return (0xF) Return (0xF)

180
src/southbridge/intel/lynxpoint/acpi/usb.asl
View File

@ -1,15 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* Intel Cougar Point USB support */
// EHCI Controller 0:1d.0 // EHCI Controller 0:1d.0
Device (EHCI) Device (EHCI)
{ {
Name(_ADR, 0x001d0000) Name (_ADR, 0x001d0000)
Name (PRWH, Package(){ 0x0d, 3 }) // LPT-H Name (PRWH, Package (){ 0x0d, 3 }) // LPT-H
Name (PRWL, Package(){ 0x6d, 3 }) // LPT-LP Name (PRWL, Package (){ 0x6d, 3 }) // LPT-LP
Method (_PRW, 0) { // Power Resources for Wake Method (_PRW, 0) { // Power Resources for Wake
If (\ISLP ()) { If (\ISLP ()) {
@ -21,19 +19,19 @@ Device (EHCI)
// Leave USB ports on for to allow Wake from USB // Leave USB ports on for to allow Wake from USB
Method(_S3D,0) // Highest D State in S3 State Method (_S3D, 0) // Highest D State in S3 State
{ {
Return (2) Return (2)
} }
Method(_S4D,0) // Highest D State in S4 State Method (_S4D, 0) // Highest D State in S4 State
{ {
Return (2) Return (2)
} }
Device (HUB7) Device (HUB7)
{ {
Name (_ADR, 0x00000000) Name (_ADR, 0)
Device (PRT1) { Name (_ADR, 1) } // USB Port 0 Device (PRT1) { Name (_ADR, 1) } // USB Port 0
Device (PRT2) { Name (_ADR, 2) } // USB Port 1 Device (PRT2) { Name (_ADR, 2) } // USB Port 1
@ -53,7 +51,7 @@ Device (XHCI)
Name (PLSD, 5) // Port Link State - RxDetect Name (PLSD, 5) // Port Link State - RxDetect
Name (PLSP, 7) // Port Link State - Polling Name (PLSP, 7) // Port Link State - Polling
OperationRegion (XPRT, PCI_Config, 0x00, 0x100) OperationRegion (XPRT, PCI_Config, 0, 0x100)
Field (XPRT, AnyAcc, NoLock, Preserve) Field (XPRT, AnyAcc, NoLock, Preserve)
{ {
Offset (0x0), Offset (0x0),
@ -81,8 +79,7 @@ Device (XHCI)
// Clear status bits // Clear status bits
Method (LPCL, 0, Serialized) Method (LPCL, 0, Serialized)
{ {
OperationRegion (XREG, SystemMemory, OperationRegion (XREG, SystemMemory, ^XMEM << 16, 0x600)
ShiftLeft (^XMEM, 16), 0x600)
Field (XREG, DWordAcc, Lock, Preserve) Field (XREG, DWordAcc, Lock, Preserve)
{ {
Offset (0x510), // PORTSCNUSB3[0] Offset (0x510), // PORTSCNUSB3[0]
@ -96,32 +93,31 @@ Device (XHCI)
} }
// Port Enabled/Disabled (Bit 1) // Port Enabled/Disabled (Bit 1)
Name (PEDB, ShiftLeft (1, 1)) Name (PEDB, 1 << 1)
// Change Status (Bits 23:17) // Change Status (Bits 23:17)
Name (CHST, ShiftLeft (0x7f, 17)) Name (CHST, 0x7f << 17)
// Port 0 // Port 0
And (PSC0, Not (PEDB), Local0) Local0 = PSC0 & ~PEDB
Or (Local0, CHST, PSC0) PSC0 = Local0 | CHST
// Port 1 // Port 1
And (PSC1, Not (PEDB), Local0) Local0 = PSC1 & ~PEDB
Or (Local0, CHST, PSC1) PSC1 = Local0 | CHST
// Port 2 // Port 2
And (PSC2, Not (PEDB), Local0) Local0 = PSC2 & ~PEDB
Or (Local0, CHST, PSC2) PSC2 = Local0 | CHST
// Port 3 // Port 3
And (PSC3, Not (PEDB), Local0) Local0 = PSC3 & ~PEDB
Or (Local0, CHST, PSC3) PSC3 = Local0 | CHST
} }
Method (LPS0, 0, Serialized) Method (LPS0, 0, Serialized)
{ {
OperationRegion (XREG, SystemMemory, OperationRegion (XREG, SystemMemory, ^XMEM << 16, 0x600)
ShiftLeft (^XMEM, 16), 0x600)
Field (XREG, DWordAcc, Lock, Preserve) Field (XREG, DWordAcc, Lock, Preserve)
{ {
Offset (0x510), // PORTSCNUSB3 Offset (0x510), // PORTSCNUSB3
@ -167,16 +163,14 @@ Device (XHCI)
} }
// Wait for all powered ports to finish polling // Wait for all powered ports to finish polling
Store (10, Local0) Local0 = 10
While (LOr (LOr (LAnd (LEqual (PPR1, 1), LEqual (PLS1, PLSP)), While ((PPR1 == 1 && PLS1 == PLSP || PPR2 == 1 && PLS2 == PLSP) ||
LAnd (LEqual (PPR2, 1), LEqual (PLS2, PLSP))), (PPR3 == 1 && PLS3 == PLSP || PPR4 == 1 && PLS4 == PLSP))
LOr (LAnd (LEqual (PPR3, 1), LEqual (PLS3, PLSP)),
LAnd (LEqual (PPR4, 1), LEqual (PLS4, PLSP)))))
{ {
If (LEqual (Local0, 0)) { If (Local0 == 0) {
Break Break
} }
Decrement (Local0) Local0--
Stall (10) Stall (10)
} }
@ -187,43 +181,37 @@ Device (XHCI)
// 3) Write 1 to port status to clear // 3) Write 1 to port status to clear
// Local# indicate if port is reset // Local# indicate if port is reset
Store (0, Local1) Local1 = 0
Store (0, Local2) Local2 = 0
Store (0, Local3) Local3 = 0
Store (0, Local4) Local4 = 0
If (LAnd (LEqual (PLS1, PLSD), If (PLS1 == PLSD && (CSC1 == 0 && PPR1 == 1)) {
LAnd (LEqual (CSC1, 0), LEqual (PPR1, 1)))) { WPR1 = 1 // Issue warm reset
Store (1, WPR1) // Issue warm reset Local1 = 1
Store (1, Local1)
} }
If (LAnd (LEqual (PLS2, PLSD), If (PLS2 == PLSD && (CSC2 == 0 && PPR2 == 1)) {
LAnd (LEqual (CSC2, 0), LEqual (PPR2, 1)))) { WPR2 = 1 // Issue warm reset
Store (1, WPR2) // Issue warm reset Local2 = 1
Store (1, Local2)
} }
If (LAnd (LEqual (PLS3, PLSD), If (PLS3 == PLSD && (CSC3 == 0 && PPR3 == 1)) {
LAnd (LEqual (CSC3, 0), LEqual (PPR3, 1)))) { WPR3 = 1 // Issue warm reset
Store (1, WPR3) // Issue warm reset Local3 = 1
Store (1, Local3)
} }
If (LAnd (LEqual (PLS4, PLSD), If (PLS4 == PLSD && (CSC4 == 0 && PPR4 == 1)) {
LAnd (LEqual (CSC4, 0), LEqual (PPR4, 1)))) { WPR4 = 1 // Issue warm reset
Store (1, WPR4) // Issue warm reset Local4 = 1
Store (1, Local4)
} }
// Poll for warm reset complete on all ports that were reset // Poll for warm reset complete on all ports that were reset
Store (10, Local0) Local0 = 10
While (LOr (LOr (LAnd (LEqual (Local1, 1), LEqual (WRC1, 0)), While ((Local1 == 1 && WRC1 == 0 || Local2 == 1 && WRC2 == 0) ||
LAnd (LEqual (Local2, 1), LEqual (WRC2, 0))), (Local3 == 1 && WRC3 == 0 || Local4 == 1 && WRC4 == 0))
LOr (LAnd (LEqual (Local3, 1), LEqual (WRC3, 0)),
LAnd (LEqual (Local4, 1), LEqual (WRC4, 0)))))
{ {
If (LEqual (Local0, 0)) { If (Local0 == 0) {
Break Break
} }
Decrement (Local0) Local0--
Stall (10) Stall (10)
} }
@ -238,15 +226,14 @@ Device (XHCI)
Method (_PS0, 0, Serialized) Method (_PS0, 0, Serialized)
{ {
If (LEqual (^DVID, 0xFFFF)) { If (^DVID == 0xFFFF) {
Return () Return ()
} }
If (LOr (LEqual (^XMEM, 0xFFFF), LEqual (^XMEM, 0x0000))) { If (^XMEM == 0xFFFF || ^XMEM == 0) {
Return () Return ()
} }
OperationRegion (XREG, SystemMemory, OperationRegion (XREG, SystemMemory, (^XMEM << 16) + 0x8000, 0x200)
Add (ShiftLeft (^XMEM, 16), 0x8000), 0x200)
Field (XREG, DWordAcc, Lock, Preserve) Field (XREG, DWordAcc, Lock, Preserve)
{ {
Offset (0x0e0), // AUX Reset Control 1 Offset (0x0e0), // AUX Reset Control 1
@ -263,30 +250,30 @@ Device (XHCI)
} }
// If device is in D3, set back to D0 // If device is in D3, set back to D0
Store (^D0D3, Local0) Local0 = ^D0D3
if (LEqual (Local0, 3)) { if (Local0 == 3) {
Store (0, ^D0D3) ^D0D3 = 0
} }
If (\ISLP ()) { If (\ISLP ()) {
// Clear PCI 0xB0[14:13] // Clear PCI 0xB0[14:13]
Store (0, ^MB13) ^MB13 = 0
Store (0, ^MB14) ^MB14 = 0
// Clear MMIO 0x816C[14,2] // Clear MMIO 0x816C[14,2]
Store (0, CLK0) CLK0 = 0
Store (0, CLK1) CLK1 = 0
} }
// Set MMIO 0x8154[31] // Set MMIO 0x8154[31]
Store (1, CLK2) CLK2 = 1
If (\ISLP ()) { If (\ISLP ()) {
// Handle per-port reset if needed // Handle per-port reset if needed
LPS0 () LPS0 ()
// Set MMIO 0x80e0[15] // Set MMIO 0x80e0[15]
Store (1, AX15) AX15 = 1
} }
Return () Return ()
@ -294,15 +281,14 @@ Device (XHCI)
Method (_PS3, 0, Serialized) Method (_PS3, 0, Serialized)
{ {
If (LEqual (^DVID, 0xFFFF)) { If (^DVID == 0xFFFF) {
Return () Return ()
} }
If (LOr (LEqual (^XMEM, 0xFFFF), LEqual (^XMEM, 0x0000))) { If (^XMEM == 0xFFFF || ^XMEM == 0) {
Return () Return ()
} }
OperationRegion (XREG, SystemMemory, OperationRegion (XREG, SystemMemory, (^XMEM << 16) + 0x8000, 0x200)
Add (ShiftLeft (^XMEM, 16), 0x8000), 0x200)
Field (XREG, DWordAcc, Lock, Preserve) Field (XREG, DWordAcc, Lock, Preserve)
{ {
Offset (0x0e0), // AUX Reset Control 1 Offset (0x0e0), // AUX Reset Control 1
@ -318,41 +304,41 @@ Device (XHCI)
CLK1, 1, // USB3 Port Aux/Core Clock Gating Enable CLK1, 1, // USB3 Port Aux/Core Clock Gating Enable
} }
Store (1, ^PMES) // Clear PME Status ^PMES = 1 // Clear PME Status
Store (1, ^PMEE) // Enable PME ^PMEE = 1 // Enable PME
// If device is in D3, set back to D0 // If device is in D3, set back to D0
Store (^D0D3, Local0) Local0 = ^D0D3
if (LEqual (Local0, 3)) { if (Local0 == 3) {
Store (0, ^D0D3) ^D0D3 = 0
} }
If (\ISLP ()) { If (\ISLP ()) {
// Set PCI 0xB0[14:13] // Set PCI 0xB0[14:13]
Store (1, ^MB13) ^MB13 = 1
Store (1, ^MB14) ^MB14 = 1
// Set MMIO 0x816C[14,2] // Set MMIO 0x816C[14,2]
Store (1, CLK0) CLK0 = 1
Store (1, CLK1) CLK1 = 1
} }
// Clear MMIO 0x8154[31] // Clear MMIO 0x8154[31]
Store (0, CLK2) CLK2 = 0
If (\ISLP ()) { If (\ISLP ()) {
// Clear MMIO 0x80e0[15] // Clear MMIO 0x80e0[15]
Store (0, AX15) AX15 = 0
} }
// Put device in D3 // Put device in D3
Store (3, ^D0D3) ^D0D3 = 3
Return () Return ()
} }
Name (PRWH, Package(){ 0x0d, 3 }) // LPT-H Name (PRWH, Package (){ 0x0d, 3 }) // LPT-H
Name (PRWL, Package(){ 0x6d, 3 }) // LPT-LP Name (PRWL, Package (){ 0x6d, 3 }) // LPT-LP
Method (_PRW, 0) { // Power Resources for Wake Method (_PRW, 0) { // Power Resources for Wake
If (\ISLP ()) { If (\ISLP ()) {
@ -364,33 +350,33 @@ Device (XHCI)
// Leave USB ports on for to allow Wake from USB // Leave USB ports on for to allow Wake from USB
Method(_S3D,0) // Highest D State in S3 State Method (_S3D, 0) // Highest D State in S3 State
{ {
Return (3) Return (3)
} }
Method(_S4D,0) // Highest D State in S4 State Method (_S4D, 0) // Highest D State in S4 State
{ {
Return (3) Return (3)
} }
Device (HUB7) Device (HUB7)
{ {
Name (_ADR, 0x00000000) Name (_ADR, 0)
// GPLD: Generate Port Location Data (PLD) // GPLD: Generate Port Location Data (PLD)
Method (GPLD, 1, Serialized) { Method (GPLD, 1, Serialized) {
Name (PCKG, Package (0x01) { Name (PCKG, Package () {
Buffer (0x10) {} Buffer (0x10) {}
}) })
// REV: Revision 0x02 for ACPI 5.0 // REV: Revision 2 for ACPI 5.0
CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV) CreateField (DerefOf (PCKG [0]), 0, 7, REV)
Store (0x02, REV) REV = 2
// VISI: Port visibility to user per port // VISI: Port visibility to user per port
CreateField (DerefOf (Index (PCKG, Zero)), 0x40, One, VISI) CreateField (DerefOf (PCKG [0]), 0x40, 1, VISI)
Store (Arg0, VISI) VISI = Arg0
Return (PCKG) Return (PCKG)
} }