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{soc,northbridge}/Kconfig: Remove unused CACHE_MRC_SIZE_KB 

Change-Id: Ie922832bc7641a44a53c0cda8d808579c66420b5
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33743
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Elyes HAOUAS 2019-06-24 19:22:58 +02:00 committed by Martin Roth
parent 85d3b40a19
commit e5845bfb2d
3 changed files with 0 additions and 12 deletions
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4
src/northbridge/intel/haswell/Kconfig
View File

@ -55,10 +55,6 @@ config MMCONF_BASE_ADDRESS
hex hex
default 0xf0000000 default 0xf0000000
config CACHE_MRC_SIZE_KB
int
default 512
config DCACHE_RAM_BASE config DCACHE_RAM_BASE
hex hex
default 0xff7c0000 default 0xff7c0000

4
src/northbridge/intel/sandybridge/Kconfig
View File

@ -64,10 +64,6 @@ config VGA_BIOS_ID
string string
default "8086,0106" default "8086,0106"
config CACHE_MRC_SIZE_KB
int
default 512
config BOOTBLOCK_NORTHBRIDGE_INIT config BOOTBLOCK_NORTHBRIDGE_INIT
string string
default "northbridge/intel/sandybridge/bootblock.c" default "northbridge/intel/sandybridge/bootblock.c"

4
src/soc/intel/broadwell/Kconfig
View File

@ -106,10 +106,6 @@ config VGA_BIOS_ID
string string
default "8086,0406" default "8086,0406"
config CACHE_MRC_SIZE_KB
int
default 512
config DCACHE_RAM_BASE config DCACHE_RAM_BASE
hex hex
default 0xff7c0000 default 0xff7c0000