util/superiotool: clarify usage of MISC and NANA defines
Change-Id: I0b3c5c810bfb05eaec13511391ecd55d7b9eb4e8 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33402 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -127,9 +127,15 @@ and print its vendor, name, ID, revision, and config port.\n"
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#define EOT -1 /* End Of Table */
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#define NOLDN -2 /* NO LDN needed */
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#define NANA -3 /* Not Available */
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#define NANA -3 /* Not Available:
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Used for registers having externally controlled
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values that can change during runtime like
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GPIO input value registers. */
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#define RSVD -4 /* Reserved */
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#define MISC -5 /* Needs special comment in output */
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#define MISC -5 /* Needs special comment in output:
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Used for registers depending on external pin straps
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configuring static, but board-specific settings like
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SIO base address or AMD/Intel power seqencing type. */
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#define MAXLDN 0x14 /* Biggest LDN */
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#define LDNSIZE (MAXLDN + 3) /* Biggest LDN + 0 + NOLDN + EOT */
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#define MAXNUMIDX 170 /* Maximum number of indices */
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