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util/superiotool: clarify usage of MISC and NANA defines 

Change-Id: I0b3c5c810bfb05eaec13511391ecd55d7b9eb4e8
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33402
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Felix Held 2019-06-11 19:23:55 +02:00
parent 6302203fb4
commit e5b05d61df
1 changed files with 8 additions and 2 deletions
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10
util/superiotool/superiotool.h
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@ -127,9 +127,15 @@ and print its vendor, name, ID, revision, and config port.\n"
#define EOT -1 /* End Of Table */ #define EOT -1 /* End Of Table */
#define NOLDN -2 /* NO LDN needed */ #define NOLDN -2 /* NO LDN needed */
#define NANA -3 /* Not Available */ #define NANA -3 /* Not Available:
Used for registers having externally controlled
values that can change during runtime like
GPIO input value registers. */
#define RSVD -4 /* Reserved */ #define RSVD -4 /* Reserved */
#define MISC -5 /* Needs special comment in output */ #define MISC -5 /* Needs special comment in output:
Used for registers depending on external pin straps
configuring static, but board-specific settings like
SIO base address or AMD/Intel power seqencing type. */
#define MAXLDN 0x14 /* Biggest LDN */ #define MAXLDN 0x14 /* Biggest LDN */
#define LDNSIZE (MAXLDN + 3) /* Biggest LDN + 0 + NOLDN + EOT */ #define LDNSIZE (MAXLDN + 3) /* Biggest LDN + 0 + NOLDN + EOT */
#define MAXNUMIDX 170 /* Maximum number of indices */ #define MAXNUMIDX 170 /* Maximum number of indices */