Remove duplicate line from pci_ids.h.

Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5920 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/Kconfig

@@ -720,6 +720,10 @@ config AP_CODE_IN_CAR
 	bool
 	default n
 
+config RAMINIT_SYSINFO
+	bool
+	default n
+
 config ENABLE_APIC_EXT_ID
 	bool
 	default n

src/cpu/amd/model_10xxx/init_cpus.c

@@ -257,7 +257,7 @@ static void STOP_CAR_AND_CPU(void)
 	stop_this_cpu();
 }
 
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 static u32 init_cpus(u32 cpu_init_detectedx, struct sys_info *sysinfo)
 #else
 static u32 init_cpus(u32 cpu_init_detectedx)
@@ -918,7 +918,7 @@ static void finalize_node_setup(struct sys_info *sysinfo)
 	u8 nodes = get_nodes();
 	u32 reg;
 
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 	/* read Node0 F0_0x64 bit [8:10] to find out SbLink # */
 	reg = pci_read_config32(NODE_HT(0), 0x64);
 	sysinfo->sblk = (reg >> 8) & 7;

src/cpu/amd/model_fxx/init_cpus.c

@@ -209,7 +209,7 @@ static void STOP_CAR_AND_CPU(void)
 	stop_this_cpu();
 }
 
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 static u32 init_cpus(u32 cpu_init_detectedx, struct sys_info *sysinfo)
 #else
 static u32 init_cpus(u32 cpu_init_detectedx)

src/cpu/amd/model_fxx/powernow_acpi.c

@@ -30,6 +30,7 @@
 #include <cpu/amd/amdk8_sysconf.h>
 #include <arch/cpu.h>
 
+#if CONFIG_K8_REV_F_SUPPORT
 static int write_pstates_for_core(u8 pstate_num, u16 *pstate_feq, u8 *pstate_vid,
 				u8 *pstate_fid, u32 *pstate_power, int coreID,
 				u32 pcontrol_blk, u8 plen, u8 onlyBSP)
@@ -386,3 +387,12 @@ int amd_model_fxx_generate_powernow(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
 	acpigen_patch_len(lens - 1);
 	return lens;
 }
+
+#else
+
+int amd_model_fxx_generate_powernow(u32 pcontrol_blk, u8 plen, u8 onlyBSP)
+{
+	return 0;
+}
+
+#endif

src/cpu/amd/socket_754/Kconfig

@@ -1,13 +1,3 @@
 config CPU_AMD_SOCKET_754
 	bool
 	select CPU_AMD_MODEL_FXX
-
-config CPU_SOCKET_TYPE
-	hex
-	default 0x10
-	depends on CPU_AMD_SOCKET_754
-
-config DIMM_SUPPORT
-	hex
-	default 0x108
-	depends on CPU_AMD_SOCKET_754

src/cpu/amd/socket_939/Kconfig

@@ -2,12 +2,3 @@ config CPU_AMD_SOCKET_939
 	bool
 	select CPU_AMD_MODEL_FXX
 
-config CPU_SOCKET_TYPE
-	hex
-	default 0x0
-	depends on CPU_AMD_SOCKET_939
-
-config DIMM_SUPPORT
-	hex
-	default 0x108
-	depends on CPU_AMD_SOCKET_939

src/cpu/amd/socket_940/Kconfig

@@ -9,14 +9,6 @@ config SOCKET_SPECIFIC_OPTIONS
 	select CPU_AMD_MODEL_FXX
 	select CACHE_AS_RAM
 
-config CPU_SOCKET_TYPE
-	hex
-	default 0x0
-
-config DIMM_SUPPORT
-	hex
-	default 0x108
-
 config CPU_ADDR_BITS
 	int
 	default 40

src/lib/generic_sdram.c

@@ -1,9 +1,5 @@
 #include <lib.h> /* Prototypes */
 
-#ifndef RAMINIT_SYSINFO
-        #define RAMINIT_SYSINFO 0
-#endif
-
 static inline void print_debug_sdram_8(const char *strval, uint32_t val)
 {
 #if CONFIG_CACHE_AS_RAM
@@ -14,7 +10,7 @@ static inline void print_debug_sdram_8(const char *strval, uint32_t val)
 }
 
 /* Setup SDRAM */
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 void sdram_initialize(int controllers, const struct mem_controller *ctrl, void *sysinfo)
 #else
 void sdram_initialize(int controllers, const struct mem_controller *ctrl)
@@ -25,7 +21,7 @@ void sdram_initialize(int controllers, const struct mem_controller *ctrl)
 	for(i = 0; i < controllers; i++) {
 		print_debug_sdram_8("Ram1.", i);
 
-	#if RAMINIT_SYSINFO == 1
+	#if CONFIG_RAMINIT_SYSINFO
 		sdram_set_registers(ctrl + i, sysinfo);
 	#else
 		sdram_set_registers(ctrl + i);
@@ -36,7 +32,7 @@ void sdram_initialize(int controllers, const struct mem_controller *ctrl)
 	for(i = 0; i < controllers; i++) {
                 print_debug_sdram_8("Ram2.", i);
 
-	#if RAMINIT_SYSINFO == 1
+	#if CONFIG_RAMINIT_SYSINFO
 		sdram_set_spd_registers(ctrl + i, sysinfo);
 	#else
                 sdram_set_spd_registers(ctrl + i);
@@ -50,7 +46,7 @@ void sdram_initialize(int controllers, const struct mem_controller *ctrl)
 	 */
 	print_debug("Ram3\n");
 
-	#if RAMINIT_SYSINFO == 1
+	#if CONFIG_RAMINIT_SYSINFO
 	sdram_enable(controllers, ctrl, sysinfo);
 	#else
 	sdram_enable(controllers, ctrl);

src/mainboard/amd/dbm690t/Kconfig

@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_HARD_RESET
 	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/amd/dbm690t/romstage.c

@@ -17,7 +17,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
 #define SET_FIDVID 1
 #define QRANK_DIMM_SUPPORT 1
 #if CONFIG_LOGICAL_CPUS==1

src/mainboard/amd/mahogany/Kconfig

@@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_HARD_RESET
 	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 	select GFXUMA
 
 config MAINBOARD_DIR

src/mainboard/amd/mahogany/romstage.c

@@ -17,7 +17,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
 #define SET_FIDVID 1
 #define QRANK_DIMM_SUPPORT 1
 #if CONFIG_LOGICAL_CPUS==1

src/mainboard/amd/mahogany_fam10/Kconfig

@@ -24,6 +24,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select AMDMCT
 	select GENERATE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 	select ENABLE_APIC_EXT_ID
 	select TINY_BOOTBLOCK
 	select GFXUMA

src/mainboard/amd/mahogany_fam10/romstage.c

@@ -21,8 +21,6 @@
 #define SYSTEM_TYPE 1	/* DESKTOP */
 //#define SYSTEM_TYPE 2	/* MOBILE */
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/amd/pistachio/Kconfig

@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select WAIT_BEFORE_CPUS_INIT
 	select HAVE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/amd/pistachio/romstage.c

@@ -17,7 +17,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
 #define SET_FIDVID 1
 #define QRANK_DIMM_SUPPORT 1
 #if CONFIG_LOGICAL_CPUS==1

src/mainboard/amd/serengeti_cheetah/Kconfig

@@ -24,6 +24,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select WAIT_BEFORE_CPUS_INIT
 	select HAVE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/amd/serengeti_cheetah/ap_romstage.c

@@ -1,8 +1,6 @@
 #define ASSEMBLY 1
 #define __PRE_RAM__
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/amd/serengeti_cheetah/romstage.c

@@ -1,5 +1,3 @@
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/amd/serengeti_cheetah_fam10/Kconfig

@@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select AMDMCT
 	select HAVE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 	select ENABLE_APIC_EXT_ID
 	select LIFT_BSP_APIC_ID
 	select TINY_BOOTBLOCK

src/mainboard/amd/serengeti_cheetah_fam10/romstage.c

@@ -21,8 +21,6 @@
 //#define SYSTEM_TYPE 1	/* DESKTOP */
 //#define SYSTEM_TYPE 2	/* MOBILE */
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/amd/tilapia_fam10/Kconfig

@@ -24,6 +24,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select AMDMCT
 	select GENERATE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 	select ENABLE_APIC_EXT_ID
 	select TINY_BOOTBLOCK
 	select GFXUMA

src/mainboard/amd/tilapia_fam10/romstage.c

@@ -21,8 +21,6 @@
 #define SYSTEM_TYPE 1	/* DESKTOP */
 //#define SYSTEM_TYPE 2	/* MOBILE */
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/asrock/939a785gmh/Kconfig

@@ -23,6 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
 	select BOARD_ROMSIZE_KB_1024
 	select GFXUMA
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/asrock/939a785gmh/romstage.c

@@ -18,7 +18,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
 #define SET_FIDVID 1
 #define QRANK_DIMM_SUPPORT 1
 #if CONFIG_LOGICAL_CPUS==1

src/mainboard/asus/a8v-e_se/Kconfig

@@ -15,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_ACPI_TABLES
 	select HAVE_MP_TABLE
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/asus/a8v-e_se/romstage.c

@@ -22,8 +22,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 unsigned int get_sbdn(unsigned bus);
 
 /* Used by raminit. */

src/mainboard/asus/m2v-mx_se/Kconfig

@@ -32,6 +32,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_OPTION_TABLE
 	select HAVE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 	select VGA
 	select TINY_BOOTBLOCK
 	select HAVE_MAINBOARD_RESOURCES

src/mainboard/asus/m2v-mx_se/romstage.c

@@ -22,8 +22,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 unsigned int get_sbdn(unsigned bus);
 
 /* Used by raminit. */

src/mainboard/asus/m4a785-m/Kconfig

@@ -23,6 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select AMDMCT
 	select GENERATE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 	select ENABLE_APIC_EXT_ID
 	select TINY_BOOTBLOCK
 	select GFXUMA

src/mainboard/asus/m4a785-m/romstage.c

@@ -21,8 +21,6 @@
 #define SYSTEM_TYPE 1	/* DESKTOP */
 //#define SYSTEM_TYPE 2	/* MOBILE */
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/gigabyte/ga_2761gxdk/Kconfig

@@ -17,6 +17,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select LIFT_BSP_APIC_ID
 	select K8_REV_F_SUPPORT
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c

@@ -24,8 +24,6 @@
 #define ASSEMBLY 1
 #define __PRE_RAM__
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/gigabyte/ga_2761gxdk/romstage.c

@@ -21,8 +21,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define K8_ALLOCATE_IO_RANGE 1
 
 #define QRANK_DIMM_SUPPORT 1

src/mainboard/gigabyte/m57sli/Kconfig

@@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_ACPI_TABLES
 	select K8_REV_F_SUPPORT
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/gigabyte/m57sli/ap_romstage.c

@@ -22,8 +22,6 @@
 #define ASSEMBLY 1
 #define __PRE_RAM__
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/gigabyte/m57sli/romstage.c

@@ -19,8 +19,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define K8_ALLOCATE_IO_RANGE 1
 
 #define QRANK_DIMM_SUPPORT 1

src/mainboard/gigabyte/ma785gmt/Kconfig

@@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select ENABLE_APIC_EXT_ID
 	select TINY_BOOTBLOCK
 	select GFXUMA
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/gigabyte/ma785gmt/romstage.c

@@ -21,8 +21,6 @@
 #define SYSTEM_TYPE 1	/* DESKTOP */
 //#define SYSTEM_TYPE 2	/* MOBILE */
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/gigabyte/ma78gm/Kconfig

@@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select ENABLE_APIC_EXT_ID
 	select TINY_BOOTBLOCK
 	select GFXUMA
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/gigabyte/ma78gm/romstage.c

@@ -21,8 +21,6 @@
 #define SYSTEM_TYPE 1	/* DESKTOP */
 //#define SYSTEM_TYPE 2	/* MOBILE */
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/hp/dl145_g3/Kconfig

@@ -19,6 +19,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_HARD_RESET
 	select LIFT_BSP_APIC_ID
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
 
 config MAINBOARD_DIR

src/mainboard/hp/dl145_g3/romstage.c

@@ -25,8 +25,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define K8_ALLOCATE_IO_RANGE 1
 
 #define QRANK_DIMM_SUPPORT 1

src/mainboard/hp/dl165_g6_fam10/Kconfig

@@ -19,6 +19,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_HARD_RESET
 	select LIFT_BSP_APIC_ID
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 	select ENABLE_APIC_EXT_ID
 	select AMDMCT
 	select TINY_BOOTBLOCK

src/mainboard/hp/dl165_g6_fam10/romstage.c

@@ -25,8 +25,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define FAM10_SCAN_PCI_BUS 0
 #define FAM10_ALLOCATE_IO_RANGE 1
 

src/mainboard/iei/kino-780am2-fam10/Kconfig

@@ -24,6 +24,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select AMDMCT
 	select GENERATE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 	select ENABLE_APIC_EXT_ID
 	select TINY_BOOTBLOCK
 	select GFXUMA

src/mainboard/iei/kino-780am2-fam10/romstage.c

@@ -21,8 +21,6 @@
 #define SYSTEM_TYPE 1	/* DESKTOP */
 //#define SYSTEM_TYPE 2	/* MOBILE */
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/iwill/dk8_htx/Kconfig

@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select WAIT_BEFORE_CPUS_INIT
 	select HAVE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/iwill/dk8_htx/romstage.c

@@ -1,5 +1,3 @@
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/iwill/dk8s2/Kconfig

@@ -17,6 +17,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select WAIT_BEFORE_CPUS_INIT
 	select ATI_RAGE_XL
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/iwill/dk8s2/romstage.c

@@ -1,5 +1,3 @@
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/iwill/dk8x/Kconfig

@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
 	select WAIT_BEFORE_CPUS_INIT
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/iwill/dk8x/romstage.c

@@ -1,5 +1,3 @@
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/jetway/pa78vm5/Kconfig

@@ -24,6 +24,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select AMDMCT
 	select GENERATE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 	select ENABLE_APIC_EXT_ID
 	select TINY_BOOTBLOCK
 	select GFXUMA

src/mainboard/jetway/pa78vm5/romstage.c

@@ -22,8 +22,6 @@
 #define SYSTEM_TYPE 1	/* DESKTOP */
 //#define SYSTEM_TYPE 2	/* MOBILE */
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/kontron/kt690/Kconfig

@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_HARD_RESET
 	select HAVE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
 
 config MAINBOARD_DIR

src/mainboard/kontron/kt690/romstage.c

@@ -18,7 +18,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
 #define SET_FIDVID 1
 #define QRANK_DIMM_SUPPORT 1
 #if CONFIG_LOGICAL_CPUS==1

src/mainboard/msi/ms7260/Kconfig

@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select LIFT_BSP_APIC_ID
 	select K8_REV_F_SUPPORT
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/msi/ms7260/ap_romstage.c

@@ -23,7 +23,6 @@
 
 #define __PRE_RAM__
 
-#define RAMINIT_SYSINFO 1
 #define SET_NB_CFG_54 1			/* Used by RAM init. */
 #define QRANK_DIMM_SUPPORT 1
 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0

src/mainboard/msi/ms7260/romstage.c

@@ -24,7 +24,6 @@
 // #define DQS_TRAIN_DEBUG 1
 // #define RES_DEBUG 1
 
-#define RAMINIT_SYSINFO 1
 #define K8_ALLOCATE_IO_RANGE 1
 #define QRANK_DIMM_SUPPORT 1
 #if CONFIG_LOGICAL_CPUS == 1

src/mainboard/msi/ms9185/Kconfig

@@ -19,6 +19,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_HARD_RESET
 	select LIFT_BSP_APIC_ID
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
 
 config MAINBOARD_DIR

src/mainboard/msi/ms9185/romstage.c

@@ -23,8 +23,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/msi/ms9282/Kconfig

@@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_HARD_RESET
 	select K8_REV_F_SUPPORT
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/msi/ms9282/romstage.c

@@ -22,8 +22,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/msi/ms9652_fam10/Kconfig

@@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_OPTION_TABLE
 	select HAVE_HARD_RESET
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 	select ENABLE_APIC_EXT_ID
 	select AMDMCT
 	select TINY_BOOTBLOCK

src/mainboard/msi/ms9652_fam10/romstage.c

@@ -19,8 +19,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define FAM10_SCAN_PCI_BUS 0
 #define FAM10_ALLOCATE_IO_RANGE 1
 

src/mainboard/nvidia/l1_2pvv/Kconfig

@@ -21,6 +21,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select LIFT_BSP_APIC_ID
 	select K8_REV_F_SUPPORT
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/nvidia/l1_2pvv/ap_romstage.c

@@ -22,8 +22,6 @@
 #define ASSEMBLY 1
 #define __PRE_RAM__
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/nvidia/l1_2pvv/romstage.c

@@ -19,8 +19,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define K8_ALLOCATE_IO_RANGE 1
 
 #define QRANK_DIMM_SUPPORT 1

src/mainboard/supermicro/h8dme/Kconfig

@@ -21,6 +21,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	#select AP_CODE_IN_CAR
 	select LIFT_BSP_APIC_ID
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/supermicro/h8dme/ap_romstage.c

@@ -22,8 +22,6 @@
 #define ASSEMBLY 1
 #define __PRE_RAM__
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/supermicro/h8dme/romstage.c

@@ -16,8 +16,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define K8_ALLOCATE_IO_RANGE 1
 
 #define QRANK_DIMM_SUPPORT 1

src/mainboard/supermicro/h8dmr/Kconfig

@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_HARD_RESET
 	select LIFT_BSP_APIC_ID
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/supermicro/h8dmr/ap_romstage.c

@@ -22,8 +22,6 @@
 #define ASSEMBLY 1
 #define __PRE_RAM__
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/supermicro/h8dmr/romstage.c

@@ -19,8 +19,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define K8_ALLOCATE_IO_RANGE 1
 
 #define QRANK_DIMM_SUPPORT 1

src/mainboard/supermicro/h8dmr_fam10/Kconfig

@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select LIFT_BSP_APIC_ID
 	select AMDMCT
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 	select TINY_BOOTBLOCK
 	select ENABLE_APIC_EXT_ID
 

src/mainboard/supermicro/h8dmr_fam10/romstage.c

@@ -19,8 +19,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define FAM10_SCAN_PCI_BUS 0
 #define FAM10_ALLOCATE_IO_RANGE 1
 

src/mainboard/supermicro/h8qme_fam10/Kconfig

@@ -19,6 +19,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select LIFT_BSP_APIC_ID
 	select AMDMCT
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 	select TINY_BOOTBLOCK
 	select ENABLE_APIC_EXT_ID
 

src/mainboard/supermicro/h8qme_fam10/romstage.c

@@ -19,8 +19,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define FAM10_SCAN_PCI_BUS 0
 #define FAM10_ALLOCATE_IO_RANGE 1
 

src/mainboard/technexion/tim5690/Kconfig

@@ -21,6 +21,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select GFXUMA
 	select HAVE_MAINBOARD_RESOURCES
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/technexion/tim5690/romstage.c

@@ -17,7 +17,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
 #define SET_FIDVID 1
 #define QRANK_DIMM_SUPPORT 1
 #if CONFIG_LOGICAL_CPUS==1

src/mainboard/technexion/tim8690/Kconfig

@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select WAIT_BEFORE_CPUS_INIT
 	select HAVE_ACPI_TABLES
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/technexion/tim8690/romstage.c

@@ -17,7 +17,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
 #define SET_FIDVID 1
 #define QRANK_DIMM_SUPPORT 1
 #if CONFIG_LOGICAL_CPUS==1

src/mainboard/tyan/s2912/Kconfig

@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select LIFT_BSP_APIC_ID
 	select K8_REV_F_SUPPORT
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/tyan/s2912/ap_romstage.c

@@ -22,8 +22,6 @@
 #define ASSEMBLY 1
 #define __PRE_RAM__
 
-#define RAMINIT_SYSINFO 1
-
 #define SET_NB_CFG_54 1
 
 //used by raminit

src/mainboard/tyan/s2912/romstage.c

@@ -19,8 +19,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define K8_ALLOCATE_IO_RANGE 1
 
 #define QRANK_DIMM_SUPPORT 1

src/mainboard/tyan/s2912_fam10/Kconfig

@@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_HARD_RESET
 	select LIFT_BSP_APIC_ID
 	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
 	select ENABLE_APIC_EXT_ID
 	select AMDMCT
 	select TINY_BOOTBLOCK

src/mainboard/tyan/s2912_fam10/romstage.c

@@ -19,8 +19,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define RAMINIT_SYSINFO 1
-
 #define FAM10_SCAN_PCI_BUS 0
 #define FAM10_ALLOCATE_IO_RANGE 1
 

src/mainboard/via/epia-m700/Kconfig

@@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select BOARD_HAS_FADT
 	select HAVE_OPTION_TABLE
 	select BOARD_ROMSIZE_KB_512
+	select RAMINIT_SYSINFO
 
 config MAINBOARD_DIR
 	string

src/mainboard/via/epia-m700/romstage.c

@@ -22,7 +22,6 @@
  * and acpi_is_wakeup_early_via_VX800() is part of Rudolf's S3 patch.
  */
 
-#define RAMINIT_SYSINFO 1
 #define PAYLOAD_IS_SEABIOS 0
 
 #include <stdint.h>

src/northbridge/amd/amdfam10/Kconfig

@@ -26,75 +26,62 @@ config NORTHBRIDGE_AMD_AMDFAM10
 	select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX
 	select MMCONF_SUPPORT
 
+if NORTHBRIDGE_AMD_AMDFAM10
 config AGP_APERTURE_SIZE
 	hex
 	default 0x4000000
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config HT3_SUPPORT
 	bool
 	default y
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config AMDMCT
 	bool
 	default y
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config MEM_TRAIN_SEQ
 	int
 	default 0
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config HW_MEM_HOLE_SIZEK
 	hex
 	default 0x100000
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config HW_MEM_HOLE_SIZE_AUTO_INC
 	bool
 	default n
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config MMCONF_BASE_ADDRESS
 	hex
 	default 0xe0000000
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config MMCONF_BUS_NUMBER
 	int
 	default 256
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config BOOTBLOCK_NORTHBRIDGE_INIT
         string
         default "northbridge/amd/amdfam10/bootblock.c"
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config SB_HT_CHAIN_UNITID_OFFSET_ONLY
 	bool
 	default n
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config DIMM_FBDIMM
 	bool
 	default n
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config DIMM_DDR2
 	bool
 	default n
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config DIMM_DDR3
 	bool
 	default n
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config DIMM_REGISTERED
 	bool
 	default n
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 if DIMM_FBDIMM
 	config DIMM_SUPPORT
@@ -123,5 +110,6 @@ if DIMM_DDR3
 		default 0x0005
 	endif
 endif
+endif
 
 source src/northbridge/amd/amdfam10/root_complex/Kconfig

src/northbridge/amd/amdk8/Kconfig

@@ -24,45 +24,40 @@ config NORTHBRIDGE_AMD_AMDK8
 	select HAVE_DEBUG_CAR
 	select HYPERTRANSPORT_PLUGIN_SUPPORT
 
+if NORTHBRIDGE_AMD_AMDK8
 config AGP_APERTURE_SIZE
 	hex
 	default 0x4000000
-	depends on NORTHBRIDGE_AMD_AMDK8
 
 config K8_HT_FREQ_1G_SUPPORT
 	bool
 	default n
-	depends on NORTHBRIDGE_AMD_AMDK8
 
 config MEM_TRAIN_SEQ
 	int
 	default 0
-	depends on NORTHBRIDGE_AMD_AMDK8
 
 config HW_MEM_HOLE_SIZEK
 	hex
 	default 0x100000
-	depends on NORTHBRIDGE_AMD_AMDK8
 
 config HW_MEM_HOLE_SIZE_AUTO_INC
 	bool
 	default n
-	depends on NORTHBRIDGE_AMD_AMDK8
 
 config SB_HT_CHAIN_UNITID_OFFSET_ONLY
 	bool
 	default n
-	depends on NORTHBRIDGE_AMD_AMDK8
+
+if K8_REV_F_SUPPORT
 
 config DIMM_DDR2
 	bool
 	default n
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 config DIMM_REGISTERED
 	bool
 	default n
-	depends on NORTHBRIDGE_AMD_AMDFAM10
 
 if DIMM_DDR2
 	if DIMM_REGISTERED
@@ -76,6 +71,10 @@ if DIMM_DDR2
 		hex
 		default 0x0004
 	endif
-endif
+endif #DIMM_DDR2
+
+endif #K8_REV_F_SUPPORT
+
+endif #NORTHBRIDGE_AMD_K8
 
 source src/northbridge/amd/amdk8/root_complex/Kconfig

src/northbridge/amd/amdk8/coherent_ht.c

@@ -1813,7 +1813,7 @@ static int optimize_link_coherent_ht(void)
 	return needs_reset;
 }
 
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 static void setup_coherent_ht_domain(void)
 #else
 static int setup_coherent_ht_domain(void)
@@ -1835,7 +1835,7 @@ static int setup_coherent_ht_domain(void)
 	}
 	coherent_ht_finalize(nodes);
 
-#if RAMINIT_SYSINFO == 0
+#if !CONFIG_RAMINIT_SYSINFO
 	return optimize_link_coherent_ht();
 #endif
 }

src/northbridge/amd/amdk8/incoherent_ht.c

@@ -11,10 +11,6 @@
 	#define CONFIG_K8_HT_FREQ_1G_SUPPORT 0
 #endif
 
-#ifndef RAMINIT_SYSINFO
-	#define RAMINIT_SYSINFO 0
-#endif
-
 #ifndef K8_ALLOCATE_IO_RANGE
 	#define K8_ALLOCATE_IO_RANGE 0
 #endif
@@ -297,7 +293,7 @@ static int ht_optimize_link(
 	return needs_reset;
 }
 
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 static void ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned offset_unitid, struct sys_info *sysinfo)
 #else
 static int ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned offset_unitid)
@@ -308,7 +304,7 @@ static int ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned of
 	uint8_t next_unitid, last_unitid;
 	unsigned uoffs;
 
-#if RAMINIT_SYSINFO == 0
+#if !CONFIG_RAMINIT_SYSINFO
 	int reset_needed = 0;
 #endif
 
@@ -415,7 +411,7 @@ static int ht_setup_chainx(device_t udev, uint8_t upos, uint8_t bus, unsigned of
 		flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
 		offs = ((flags>>10) & 1) ? PCI_HT_SLAVE1_OFFS : PCI_HT_SLAVE0_OFFS;
 
-		#if RAMINIT_SYSINFO == 1
+		#if CONFIG_RAMINIT_SYSINFO
 		/* store the link pair here and we will Setup the Hypertransport link later, after we get final FID/VID */
 		{
 			struct link_pair_st *link_pair = &sysinfo->link_pair[sysinfo->link_pair_num];
@@ -451,7 +447,7 @@ end_of_chain: ;
 		flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & 0x1f;
 		pci_write_config16(PCI_DEV(bus, real_last_unitid, 0), real_last_pos + PCI_CAP_FLAGS, flags);
 
-		#if RAMINIT_SYSINFO == 1
+		#if CONFIG_RAMINIT_SYSINFO
 		// Here need to change the dev in the array
 		int i;
 		for(i=0;i<sysinfo->link_pair_num;i++)
@@ -470,14 +466,14 @@ end_of_chain: ;
 	}
 #endif
 
-#if RAMINIT_SYSINFO == 0
+#if !CONFIG_RAMINIT_SYSINFO
 	return reset_needed;
 #endif
 
 }
 
 #if 0
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 static void ht_setup_chain(device_t udev, unsigned upos, struct sys_info *sysinfo)
 #else
 static int ht_setup_chain(device_t udev, unsigned upos)
@@ -501,7 +497,7 @@ static int ht_setup_chain(device_t udev, unsigned upos)
 	offset_unitid = 1;
 #endif
 
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 	ht_setup_chainx(udev, upos, 0, offset_unitid, sysinfo);
 #else
 	return ht_setup_chainx(udev, upos, 0, offset_unitid);
@@ -636,7 +632,7 @@ static int set_ht_link_buffer_counts_chain(uint8_t ht_c_num, unsigned vendorid,
 }
 #endif
 
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 static void ht_setup_chains(uint8_t ht_c_num, struct sys_info *sysinfo)
 #else
 static int ht_setup_chains(uint8_t ht_c_num)
@@ -651,7 +647,7 @@ static int ht_setup_chains(uint8_t ht_c_num)
 	device_t udev;
 	uint8_t i;
 
-#if RAMINIT_SYSINFO == 0
+#if !CONFIG_RAMINIT_SYSINFO
 	int reset_needed = 0;
 #else
 	sysinfo->link_pair_num = 0;
@@ -692,7 +688,7 @@ static int ht_setup_chains(uint8_t ht_c_num)
 		upos = ((reg & 0xf00)>>8) * 0x20 + 0x80;
 		udev =  PCI_DEV(0, devpos, 0);
 
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 		ht_setup_chainx(udev,upos,busn, offset_unitid, sysinfo); // all not
 #else
 		reset_needed |= ht_setup_chainx(udev,upos,busn, offset_unitid); //all not
@@ -700,7 +696,7 @@ static int ht_setup_chains(uint8_t ht_c_num)
 
 	}
 
-#if RAMINIT_SYSINFO == 0
+#if !CONFIG_RAMINIT_SYSINFO
 	reset_needed |= optimize_link_read_pointers_chain(ht_c_num);
 
 	return reset_needed;
@@ -712,7 +708,7 @@ static int ht_setup_chains(uint8_t ht_c_num)
 static inline unsigned get_nodes(void);
 #endif
 
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 static void ht_setup_chains_x(struct sys_info *sysinfo)
 #else
 static int ht_setup_chains_x(void)
@@ -734,7 +730,7 @@ static int ht_setup_chains_x(void)
 	reg = pci_read_config32(PCI_DEV(0, 0x18, 0), 0x64);
 	/* update PCI_DEV(0, 0x18, 1) 0xe0 to 0x05000m03, and next_busn=0x3f+1 */
 	print_linkn_in("SBLink=", ((reg>>8) & 3) );
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 	sysinfo->sblk = (reg>>8) & 3;
 	sysinfo->sbbusn = 0;
 	sysinfo->nodes = nodes;
@@ -840,7 +836,7 @@ static int ht_setup_chains_x(void)
 		}
 	}
 
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 	sysinfo->ht_c_num = i;
 	ht_setup_chains(i, sysinfo);
 	sysinfo->sbdn = get_sbdn(sysinfo->sbbusn);
@@ -850,7 +846,7 @@ static int ht_setup_chains_x(void)
 
 }
 
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 static int optimize_link_incoherent_ht(struct sys_info *sysinfo)
 {
 	// We need to use recorded link pair info to optimize the link

src/northbridge/amd/amdk8/raminit.c

@@ -45,7 +45,7 @@ static int controller_present(const struct mem_controller *ctrl)
 	return pci_read_config32(ctrl->f0, 0) == 0x11001022;
 }
 
-#if RAMINIT_SYSINFO==1
+#if CONFIG_RAMINIT_SYSINFO
 static void sdram_set_registers(const struct mem_controller *ctrl, struct sys_info *sysinfo)
 #else
 static void sdram_set_registers(const struct mem_controller *ctrl)
@@ -2062,7 +2062,7 @@ static long spd_set_dram_timing(const struct mem_controller *ctrl, const struct
 	return dimm_mask;
 }
 
-#if RAMINIT_SYSINFO==1
+#if CONFIG_RAMINIT_SYSINFO
 static void sdram_set_spd_registers(const struct mem_controller *ctrl, struct sys_info *sysinfo)
 #else
 static void sdram_set_spd_registers(const struct mem_controller *ctrl)
@@ -2223,7 +2223,7 @@ static void set_hw_mem_hole(int controllers, const struct mem_controller *ctrl)
 #endif
 
 #define TIMEOUT_LOOPS 300000
-#if RAMINIT_SYSINFO == 1
+#if CONFIG_RAMINIT_SYSINFO
 static void sdram_enable(int controllers, const struct mem_controller *ctrl, struct sys_info *sysinfo)
 #else
 static void sdram_enable(int controllers, const struct mem_controller *ctrl)

src/northbridge/amd/amdk8/raminit.h

@@ -15,7 +15,7 @@ struct sys_info;
 void exit_from_self(int controllers, const struct mem_controller *ctrl, struct sys_info *sysinfo);
 void setup_resource_map(const unsigned int *register_values, int max);
 
-#if defined(__PRE_RAM__) && defined(RAMINIT_SYSINFO) && RAMINIT_SYSINFO == 1
+#if defined(__PRE_RAM__) && CONFIG_RAMINIT_SYSINFO
 void sdram_initialize(int controllers, const struct mem_controller *ctrl, void *sysinfo);
 #else
 void sdram_initialize(int controllers, const struct mem_controller *ctrl);

src/northbridge/via/vx800/examples/romstage.c

@@ -20,7 +20,6 @@
 
 #define ASSEMBLY 1
 #define __PRE_RAM__
-#define RAMINIT_SYSINFO 1
 
 #include <stdint.h>
 #include <device/pci_def.h>