intel post-car: Consolidate choose_top_of_stack()

Change-Id: I2c49d68ea9a8f52737b6064bc4fa703bdb1af1df
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15463
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/cpu/intel/haswell/romstage.c

@@ -65,20 +65,6 @@ static inline u32 *stack_push(u32 *stack, u32 value)
 	return stack;
 }
 
-/* Romstage needs quite a bit of stack for decompressing images since the lzma
- * lib keeps its state on the stack during romstage. */
-#define ROMSTAGE_RAM_STACK_SIZE 0x5000
-static unsigned long choose_top_of_stack(void)
-{
-	unsigned long stack_top;
-
-	/* cbmem_add() does a find() before add(). */
-	stack_top = (unsigned long)cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK,
-	                                     ROMSTAGE_RAM_STACK_SIZE);
-	stack_top += ROMSTAGE_RAM_STACK_SIZE;
-	return stack_top;
-}
-
 /* setup_romstage_stack_after_car() determines the stack to use after
  * cache-as-ram is torn down as well as the MTRR settings to use. */
 static void *setup_romstage_stack_after_car(void)
@@ -90,7 +76,7 @@ static void *setup_romstage_stack_after_car(void)
 	u32 top_of_ram;
 
 	/* Top of stack needs to be aligned to a 4-byte boundary. */
-	top_of_stack = choose_top_of_stack() & ~3;
+	top_of_stack = romstage_ram_stack_top() & ~3;
 	slot = (void *)top_of_stack;
 	num_mtrrs = 0;
 

src/drivers/intel/fsp1_1/Kconfig

@@ -99,10 +99,6 @@ config GOP_SUPPORT
 	bool "Enable GOP support"
 	default n
 
-config ROMSTAGE_RAM_STACK_SIZE
-	hex "Size of the romstage RAM stack in bytes"
-	default 0x5000
-
 config USE_GENERIC_FSP_CAR_INC
 	bool
 	default n

src/drivers/intel/fsp1_1/stack.c

@@ -21,23 +21,7 @@
 #include <fsp/romstage.h>
 #include <fsp/stack.h>
 #include <stdlib.h>
-
+#include <program_loading.h>
-const unsigned long romstage_ram_stack_size = CONFIG_ROMSTAGE_RAM_STACK_SIZE;
-
-/*
- * Romstage needs quite a bit of stack for decompressing images since the lzma
- * lib keeps its state on the stack during romstage.
- */
-static unsigned long choose_top_of_stack(void)
-{
-	unsigned long stack_top;
-
-	/* cbmem_add() does a find() before add(). */
-	stack_top = (unsigned long)cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK,
-					     romstage_ram_stack_size);
-	stack_top += romstage_ram_stack_size;
-	return stack_top;
-}
 
 /*
  * setup_stack_and_mtrrs() determines the stack to use after
@@ -57,7 +41,7 @@ void *setup_stack_and_mtrrs(void)
 	soc_display_mtrrs();
 
 	/* Top of stack needs to be aligned to a 8-byte boundary. */
-	top_of_stack = choose_top_of_stack();
+	top_of_stack = romstage_ram_stack_top();
 	slot = (void *)top_of_stack;
 	num_mtrrs = 0;
 	max_mtrrs = soc_get_variable_mtrr_count(NULL);
@@ -68,8 +52,7 @@ void *setup_stack_and_mtrrs(void)
 	 */
 	mtrr_mask_upper = (1 << ((cpuid_eax(0x80000008) & 0xff) - 32)) - 1;
 	alignment = mmap_region_granularity();
-	aligned_ram = ALIGN_DOWN(top_of_stack - romstage_ram_stack_size,
+	aligned_ram = ALIGN_DOWN(romstage_ram_stack_bottom(), alignment);
-		alignment);
 
 	/*
 	 * The order for each MTRR is value then base with upper 32-bits of

src/include/program_loading.h

@@ -170,6 +170,12 @@ void run_ramstage(void);
 /* Called when the stage cache couldn't load ramstage on resume. */
 void ramstage_cache_invalid(void);
 
+/* Determine where stack for ramstage loader is located. */
+enum { ROMSTAGE_STACK_CBMEM, ROMSTAGE_STACK_LOW_MEM };
+uintptr_t romstage_ram_stack_base(size_t size, int src);
+uintptr_t romstage_ram_stack_top(void);
+uintptr_t romstage_ram_stack_bottom(void);
+
 /***********************
  *   PAYLOAD LOADING   *
  ***********************/

src/lib/Makefile.inc

@@ -78,6 +78,7 @@ romstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c
 ramstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c
 romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c
 romstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c
+romstage-y += romstage_stack.c
 romstage-y += stack.c
 ramstage-y += rtc.c
 

src/lib/romstage_stack.c

@@ -0,0 +1,48 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2015-2016 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <program_loading.h>
+#include <cbmem.h>
+
+/*
+ * Romstage needs quite a bit of stack for decompressing images since the lzma
+ * lib keeps its state on the stack during romstage.
+ */
+#define ROMSTAGE_RAM_STACK_SIZE 0x5000
+
+uintptr_t romstage_ram_stack_base(size_t size, int src)
+{
+	/* cbmem_add() does a find() before add(). */
+	if (src == ROMSTAGE_STACK_CBMEM)
+		return (uintptr_t)cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK, size);
+	if (src == ROMSTAGE_STACK_LOW_MEM)
+		return CONFIG_RAMTOP - size;
+	return 0;
+}
+
+uintptr_t romstage_ram_stack_bottom(void)
+{
+	return romstage_ram_stack_base(ROMSTAGE_RAM_STACK_SIZE,
+		ROMSTAGE_STACK_CBMEM);
+}
+
+uintptr_t romstage_ram_stack_top(void)
+{
+	uintptr_t stack_top = romstage_ram_stack_base(ROMSTAGE_RAM_STACK_SIZE,
+		ROMSTAGE_STACK_CBMEM);
+	stack_top += ROMSTAGE_RAM_STACK_SIZE;
+	return stack_top;
+}

src/soc/intel/baytrail/romstage/romstage.c

@@ -258,20 +258,6 @@ static inline uint32_t *stack_push(u32 *stack, u32 value)
 	return stack;
 }
 
-/* Romstage needs quite a bit of stack for decompressing images since the lzma
- * lib keeps its state on the stack during romstage. */
-static unsigned long choose_top_of_stack(void)
-{
-	unsigned long stack_top;
-	const unsigned long romstage_ram_stack_size = 0x5000;
-
-	/* cbmem_add() does a find() before add(). */
-	stack_top = (unsigned long)cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK,
-	                                     romstage_ram_stack_size);
-	stack_top += romstage_ram_stack_size;
-	return stack_top;
-}
-
 /* setup_stack_and_mttrs() determines the stack to use after
  * cache-as-ram is torn down as well as the MTRR settings to use. */
 static void *setup_stack_and_mttrs(void)
@@ -283,7 +269,7 @@ static void *setup_stack_and_mttrs(void)
 	uint32_t top_of_ram;
 
 	/* Top of stack needs to be aligned to a 4-byte boundary. */
-	top_of_stack = choose_top_of_stack() & ~3;
+	top_of_stack = romstage_ram_stack_top() & ~3;
 	slot = (void *)top_of_stack;
 	num_mtrrs = 0;
 

src/soc/intel/broadwell/romstage/stack.c

@@ -21,6 +21,7 @@
 #include <cbmem.h>
 #include <cpu/x86/mtrr.h>
 #include <soc/romstage.h>
+#include <program_loading.h>
 
 static inline uint32_t *stack_push(u32 *stack, u32 value)
 {
@@ -29,20 +30,6 @@ static inline uint32_t *stack_push(u32 *stack, u32 value)
 	return stack;
 }
 
-/* Romstage needs quite a bit of stack for decompressing images since the lzma
- * lib keeps its state on the stack during romstage. */
-static unsigned long choose_top_of_stack(void)
-{
-	unsigned long stack_top;
-	const unsigned long romstage_ram_stack_size = 0x5000;
-
-	/* cbmem_add() does a find() before add(). */
-	stack_top = (unsigned long)cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK,
-	                                     romstage_ram_stack_size);
-	stack_top += romstage_ram_stack_size;
-	return stack_top;
-}
-
 /* setup_stack_and_mttrs() determines the stack to use after
  * cache-as-ram is torn down as well as the MTRR settings to use. */
 void *setup_stack_and_mttrs(void)
@@ -54,7 +41,7 @@ void *setup_stack_and_mttrs(void)
 	uint32_t top_of_ram;
 
 	/* Top of stack needs to be aligned to a 4-byte boundary. */
-	top_of_stack = choose_top_of_stack() & ~3;
+	top_of_stack = romstage_ram_stack_top() & ~3;
 	slot = (void *)top_of_stack;
 	num_mtrrs = 0;