mb/google/dedede: Generate MS0X entry and provide variant hook

BUG=b:245426120
BRANCH=firmware-dedede-13606.B
TEST=emerge-dedede coreboot
     check SSDT table has MS0X entry
     Scope (\_SB)
    {
        Method (MS0X, 1, Serialized)
        {
            If ((Arg0 == One)) {}
            Else
            {
            }
        }
    }

Change-Id: Id01089531503e62231c5ab19e4cd8056198b9acb
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67373
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Tony Huang 2022-09-06 17:03:27 +08:00 committed by Karthik Ramasubramanian
parent 20e1dc27e9
commit e5c547c2d7
2 changed files with 44 additions and 0 deletions

View File

@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <acpi/acpi.h>
#include <acpi/acpigen.h>
#include <baseboard/variants.h>
#include <console/console.h>
#include <device/device.h>
@ -63,10 +64,46 @@ static unsigned long mainboard_write_acpi_tables(
return current;
}
static void mainboard_generate_s0ix_hook(void)
{
acpigen_write_if_lequal_op_int(ARG0_OP, 1);
variant_generate_s0ix_hook(S0IX_ENTRY);
acpigen_write_else();
variant_generate_s0ix_hook(S0IX_EXIT);
acpigen_write_if_end();
}
static void mainboard_fill_ssdt(const struct device *dev)
{
acpigen_write_scope("\\_SB");
acpigen_write_method_serialized("MS0X", 1);
mainboard_generate_s0ix_hook();
acpigen_write_method_end(); /* Method */
acpigen_write_scope_end(); /* Scope */
}
void __weak variant_generate_s0ix_hook(enum s0ix_entry entry)
{
/* Add board-specific MS0X entries */
/*
if (s0ix_entry == S0IX_ENTRY) {
implement variant operations here
}
if (s0ix_entry == S0IX_EXIT) {
implement variant operations here
}
*/
}
static void mainboard_enable(struct device *dev)
{
dev->ops->init = mainboard_dev_init;
dev->ops->write_acpi_tables = mainboard_write_acpi_tables;
dev->ops->acpi_fill_ssdt = mainboard_fill_ssdt;
}
struct chip_operations mainboard_ops = {

View File

@ -15,6 +15,11 @@ const struct pad_config *variant_early_gpio_table(size_t *num);
const struct pad_config *variant_sleep_gpio_table(size_t *num);
const struct pad_config *variant_override_gpio_table(size_t *num);
enum s0ix_entry {
S0IX_EXIT,
S0IX_ENTRY,
};
/**
* Get board's Hardware features as defined in FW_CONFIG
*
@ -44,4 +49,6 @@ void variant_devtree_update(void);
/* Modify LTE devictree settings during ramstage. */
void update_lte_device(struct acpi_gpio *lte_reset_gpio, struct acpi_gpio *lte_enable_gpio);
void variant_generate_s0ix_hook(enum s0ix_entry);
#endif /*__BASEBOARD_VARIANTS_H__ */