mb/google/skyrim: Add missing USB ports to device tree

As part of investigating b/240690391 I noticed that we were missing
the daughter board ports. Not all SKUs have these ports connected,
but it doesn't hurt to have the extra ACPI nodes.

BUG=none
TEST=build

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Id6fc34acbfa30bc15e697043bf93bcf584256128
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66605
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jon Murphy <jpmurphy@google.com>
This commit is contained in:
Raul E Rangel 2022-08-10 12:31:38 -06:00 committed by Felix Held
parent 3cff98a0e2
commit e5db74070b
1 changed files with 16 additions and 2 deletions

View File

@ -40,7 +40,7 @@ chip soc/amd/mendocino
register "port_count" = "4" register "port_count" = "4"
device usb 0.0 on # VL822 USB3 hub device usb 0.0 on # VL822 USB3 hub
chip drivers/usb/acpi chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0 (DB)"" register "desc" = ""USB3 Type-A Port A0 (MLB)""
register "type" = "UPC_TYPE_USB3_A" register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true" register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(2, 2))" register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(2, 2))"
@ -57,6 +57,13 @@ chip soc/amd/mendocino
register "enable_delay_ms" = "20" register "enable_delay_ms" = "20"
device usb 3.1 on end device usb 3.1 on end
end end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A1 (DB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, CENTER, ACPI_PLD_GROUP(3, 1))"
device usb 3.2 on end
end
end # VL822 USB3 hub end # VL822 USB3 hub
end end
end # USB 3.1 port3 end # USB 3.1 port3
@ -69,7 +76,7 @@ chip soc/amd/mendocino
register "port_count" = "4" register "port_count" = "4"
device usb 0.0 on # VL822 USB2 hub device usb 0.0 on # VL822 USB2 hub
chip drivers/usb/acpi chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A0 (DB)"" register "desc" = ""USB2 Type-A Port A0 (MLB)""
register "type" = "UPC_TYPE_USB3_A" register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true" register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(2, 2))" register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(2, 2))"
@ -81,6 +88,13 @@ chip soc/amd/mendocino
register "group" = "ACPI_PLD_GROUP(2, 2)" register "group" = "ACPI_PLD_GROUP(2, 2)"
device usb 2.1 on end device usb 2.1 on end
end end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A1 (DB)""
register "type" = "UPC_TYPE_USB3_A"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, CENTER, ACPI_PLD_GROUP(3, 1))"
device usb 2.2 on end
end
end # VL822 USB2 hub end # VL822 USB2 hub
end end
end # USB 2 port3 end # USB 2 port3