post_code: reorganize order of postcode defines
Currently, the certain postcode values aren't in increasing order of values. The change, just reorganzies the defines in increasing order of the values Signed-off-by: Sindhoor Tilak <sindhoor@sin9yt.net> Change-Id: Id5f0ddc4593f689829ab9a7fdeebd5f66939bf79 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42606 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Christian Walter <christian.walter@9elements.com>
This commit is contained in:
parent
ad0ccb336d
commit
e5f25cee1c
|
@ -59,7 +59,6 @@
|
|||
*/
|
||||
#define POST_RAMSTAGE_IS_PREPARED 0x12
|
||||
|
||||
|
||||
/**
|
||||
* \brief Entry into c_start
|
||||
*
|
||||
|
@ -83,21 +82,6 @@
|
|||
*/
|
||||
#define POST_MEM_PREINIT_PREP_END 0x36
|
||||
|
||||
/**
|
||||
* \brief Pre call to RAM stage main()
|
||||
*
|
||||
* POSTed right before RAM stage main() is called from c_start.S
|
||||
*/
|
||||
#define POST_PRE_HARDWAREMAIN 0x79
|
||||
|
||||
/**
|
||||
* \brief Entry into coreboot in RAM stage main()
|
||||
*
|
||||
* This is the first call in hardwaremain.c. If this code is POSTed, then
|
||||
* ramstage has successfully loaded and started executing.
|
||||
*/
|
||||
#define POST_ENTRY_RAMSTAGE 0x80
|
||||
|
||||
/**
|
||||
* \brief Console is initialized
|
||||
*
|
||||
|
@ -190,6 +174,21 @@
|
|||
*/
|
||||
#define POST_BS_WRITE_TABLES 0x79
|
||||
|
||||
/**
|
||||
* \brief Pre call to RAM stage main()
|
||||
*
|
||||
* POSTed right before RAM stage main() is called from c_start.S
|
||||
*/
|
||||
#define POST_PRE_HARDWAREMAIN 0x79
|
||||
|
||||
/**
|
||||
* \brief Entry into coreboot in RAM stage main()
|
||||
*
|
||||
* This is the first call in hardwaremain.c. If this code is POSTed, then
|
||||
* ramstage has successfully loaded and started executing.
|
||||
*/
|
||||
#define POST_ENTRY_RAMSTAGE 0x80
|
||||
|
||||
/**
|
||||
* \brief Load Payload
|
||||
*
|
||||
|
@ -302,22 +301,6 @@
|
|||
*/
|
||||
#define POST_FSP_MULTI_PHASE_SI_INIT_EXIT 0xa1
|
||||
|
||||
/**
|
||||
* \brief Entry into elf boot
|
||||
*
|
||||
* This POST code is called right before invoking jmp_to_elf_entry()
|
||||
* jmp_to_elf_entry() invokes the payload, and should never return
|
||||
*/
|
||||
#define POST_ENTER_ELF_BOOT 0xf8
|
||||
|
||||
/**
|
||||
* \brief Jumping to payload
|
||||
*
|
||||
* Called right before jumping to a payload. If the boot sequence stops with
|
||||
* this code, chances are the payload freezes.
|
||||
*/
|
||||
#define POST_JUMPING_TO_PAYLOAD 0xf3
|
||||
|
||||
/**
|
||||
* \brief Invalid or corrupt ROM
|
||||
*
|
||||
|
@ -386,6 +369,22 @@
|
|||
*/
|
||||
#define POST_RESUME_FAILURE 0xef
|
||||
|
||||
/**
|
||||
* \brief Jumping to payload
|
||||
*
|
||||
* Called right before jumping to a payload. If the boot sequence stops with
|
||||
* this code, chances are the payload freezes.
|
||||
*/
|
||||
#define POST_JUMPING_TO_PAYLOAD 0xf3
|
||||
|
||||
/**
|
||||
* \brief Entry into elf boot
|
||||
*
|
||||
* This POST code is called right before invoking jmp_to_elf_entry()
|
||||
* jmp_to_elf_entry() invokes the payload, and should never return
|
||||
*/
|
||||
#define POST_ENTER_ELF_BOOT 0xf8
|
||||
|
||||
/**
|
||||
* \brief Final code before OS resumes
|
||||
*
|
||||
|
|
Loading…
Reference in New Issue