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arch/x86: Fix prefer errors detected by checkpatch 

Fix the following warnings detected by checkpatch.pl:

WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
WARNING: plain inline is preferred over __inline__

TEST=Build and run on Galileo Gen2

Change-Id: I8ba98dfe04481a7ccf4f3b910660178b7e22a4a7
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18863
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Lee Leahy 2017-03-16 14:16:56 -07:00
parent 024b13d07c
commit e5f29e8bf8
7 changed files with 38 additions and 37 deletions
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8
src/arch/x86/acpi_device.c
View File

@ -492,12 +492,12 @@ void acpi_device_write_spi(const struct acpi_spi *spi)
/* PowerResource() with Enable and/or Reset control */ /* PowerResource() with Enable and/or Reset control */
void acpi_device_add_power_res( void acpi_device_add_power_res(
struct acpi_gpio *reset, unsigned reset_delay_ms, struct acpi_gpio *reset, unsigned int reset_delay_ms,
struct acpi_gpio *enable, unsigned enable_delay_ms) struct acpi_gpio *enable, unsigned int enable_delay_ms)
{ {
const char *power_res_dev_states[] = { "_PR0", "_PR3" }; const char *power_res_dev_states[] = { "_PR0", "_PR3" };
unsigned reset_gpio = reset->pins[0]; unsigned int reset_gpio = reset->pins[0];
unsigned enable_gpio = enable->pins[0]; unsigned int enable_gpio = enable->pins[0];
if (!reset_gpio && !enable_gpio) if (!reset_gpio && !enable_gpio)
return; return;

4
src/arch/x86/include/arch/acpi_device.h
View File

@ -288,8 +288,8 @@ void acpi_device_write_spi(const struct acpi_spi *spi);
* GPIO is optional, but at least one must be provided. * GPIO is optional, but at least one must be provided.
*/ */
void acpi_device_add_power_res( void acpi_device_add_power_res(
struct acpi_gpio *reset, unsigned reset_delay_ms, struct acpi_gpio *reset, unsigned int reset_delay_ms,
struct acpi_gpio *enable, unsigned enable_delay_ms); struct acpi_gpio *enable, unsigned int enable_delay_ms);
/* /*
* Writing Device Properties objects via _DSD * Writing Device Properties objects via _DSD

6
src/arch/x86/include/arch/cpu.h
View File

@ -69,7 +69,7 @@ static inline struct cpuid_result cpuid(int op)
/* /*
* Generic Extended CPUID function * Generic Extended CPUID function
*/ */
static inline struct cpuid_result cpuid_ext(int op, unsigned ecx) static inline struct cpuid_result cpuid_ext(int op, unsigned int ecx)
{ {
struct cpuid_result result; struct cpuid_result result;
asm volatile( asm volatile(
@ -171,8 +171,8 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1);
struct device; struct device;
struct cpu_device_id { struct cpu_device_id {
unsigned vendor; unsigned int vendor;
unsigned device; unsigned int device;
}; };
struct cpu_driver { struct cpu_driver {

23
src/arch/x86/include/arch/io.h
View File

@ -292,7 +292,7 @@ void pci_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value)
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
void pci_write_config32(pci_devfn_t dev, unsigned where, uint32_t value) void pci_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value)
{ {
if (IS_ENABLED(CONFIG_MMCONF_SUPPORT)) if (IS_ENABLED(CONFIG_MMCONF_SUPPORT))
pci_mmio_write_config32(dev, where, value); pci_mmio_write_config32(dev, where, value);
@ -301,7 +301,7 @@ void pci_write_config32(pci_devfn_t dev, unsigned where, uint32_t value)
} }
#define PCI_DEV_INVALID (0xffffffffU) #define PCI_DEV_INVALID (0xffffffffU)
static inline pci_devfn_t pci_io_locate_device(unsigned pci_id, pci_devfn_t dev) static inline pci_devfn_t pci_io_locate_device(unsigned int pci_id, pci_devfn_t dev)
{ {
for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) { for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) {
unsigned int id; unsigned int id;
@ -312,7 +312,7 @@ static inline pci_devfn_t pci_io_locate_device(unsigned pci_id, pci_devfn_t dev)
return PCI_DEV_INVALID; return PCI_DEV_INVALID;
} }
static inline pci_devfn_t pci_locate_device(unsigned pci_id, pci_devfn_t dev) static inline pci_devfn_t pci_locate_device(unsigned int pci_id, pci_devfn_t dev)
{ {
for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) { for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) {
unsigned int id; unsigned int id;
@ -323,7 +323,8 @@ static inline pci_devfn_t pci_locate_device(unsigned pci_id, pci_devfn_t dev)
return PCI_DEV_INVALID; return PCI_DEV_INVALID;
} }
static inline pci_devfn_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus) static inline pci_devfn_t pci_locate_device_on_bus(unsigned int pci_id,
unsigned int bus)
{ {
pci_devfn_t dev, last; pci_devfn_t dev, last;
@ -342,14 +343,14 @@ static inline pci_devfn_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus
/* Generic functions for pnp devices */ /* Generic functions for pnp devices */
static inline __attribute__((always_inline)) void pnp_write_config(pnp_devfn_t dev, uint8_t reg, uint8_t value) static inline __attribute__((always_inline)) void pnp_write_config(pnp_devfn_t dev, uint8_t reg, uint8_t value)
{ {
unsigned port = dev >> 8; unsigned int port = dev >> 8;
outb(reg, port); outb(reg, port);
outb(value, port + 1); outb(value, port + 1);
} }
static inline __attribute__((always_inline)) uint8_t pnp_read_config(pnp_devfn_t dev, uint8_t reg) static inline __attribute__((always_inline)) uint8_t pnp_read_config(pnp_devfn_t dev, uint8_t reg)
{ {
unsigned port = dev >> 8; unsigned int port = dev >> 8;
outb(reg, port); outb(reg, port);
return inb(port + 1); return inb(port + 1);
} }
@ -357,7 +358,7 @@ static inline __attribute__((always_inline)) uint8_t pnp_read_config(pnp_devfn_t
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
void pnp_set_logical_device(pnp_devfn_t dev) void pnp_set_logical_device(pnp_devfn_t dev)
{ {
unsigned device = dev & 0xff; unsigned int device = dev & 0xff;
pnp_write_config(dev, 0x07, device); pnp_write_config(dev, 0x07, device);
} }
@ -374,26 +375,26 @@ int pnp_read_enable(pnp_devfn_t dev)
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
void pnp_set_iobase(pnp_devfn_t dev, unsigned index, unsigned iobase) void pnp_set_iobase(pnp_devfn_t dev, unsigned int index, unsigned int iobase)
{ {
pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff); pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff);
pnp_write_config(dev, index + 1, iobase & 0xff); pnp_write_config(dev, index + 1, iobase & 0xff);
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
uint16_t pnp_read_iobase(pnp_devfn_t dev, unsigned index) uint16_t pnp_read_iobase(pnp_devfn_t dev, unsigned int index)
{ {
return ((uint16_t)(pnp_read_config(dev, index)) << 8) | pnp_read_config(dev, index + 1); return ((uint16_t)(pnp_read_config(dev, index)) << 8) | pnp_read_config(dev, index + 1);
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
void pnp_set_irq(pnp_devfn_t dev, unsigned index, unsigned irq) void pnp_set_irq(pnp_devfn_t dev, unsigned int index, unsigned int irq)
{ {
pnp_write_config(dev, index, irq); pnp_write_config(dev, index, irq);
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
void pnp_set_drq(pnp_devfn_t dev, unsigned index, unsigned drq) void pnp_set_drq(pnp_devfn_t dev, unsigned int index, unsigned int drq)
{ {
pnp_write_config(dev, index, drq & 0xff); pnp_write_config(dev, index, drq & 0xff);
} }

24
src/arch/x86/include/arch/pci_io_cfg.h
View File

@ -17,9 +17,9 @@
#include <arch/io.h> #include <arch/io.h>
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
uint8_t pci_io_read_config8(pci_devfn_t dev, unsigned where) uint8_t pci_io_read_config8(pci_devfn_t dev, unsigned int where)
{ {
unsigned addr; unsigned int addr;
#if !CONFIG_PCI_IO_CFG_EXT #if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where; addr = (dev>>4) | where;
#else #else
@ -30,9 +30,9 @@ uint8_t pci_io_read_config8(pci_devfn_t dev, unsigned where)
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
uint16_t pci_io_read_config16(pci_devfn_t dev, unsigned where) uint16_t pci_io_read_config16(pci_devfn_t dev, unsigned int where)
{ {
unsigned addr; unsigned int addr;
#if !CONFIG_PCI_IO_CFG_EXT #if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where; addr = (dev>>4) | where;
#else #else
@ -43,9 +43,9 @@ uint16_t pci_io_read_config16(pci_devfn_t dev, unsigned where)
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
uint32_t pci_io_read_config32(pci_devfn_t dev, unsigned where) uint32_t pci_io_read_config32(pci_devfn_t dev, unsigned int where)
{ {
unsigned addr; unsigned int addr;
#if !CONFIG_PCI_IO_CFG_EXT #if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where; addr = (dev>>4) | where;
#else #else
@ -56,9 +56,9 @@ uint32_t pci_io_read_config32(pci_devfn_t dev, unsigned where)
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
void pci_io_write_config8(pci_devfn_t dev, unsigned where, uint8_t value) void pci_io_write_config8(pci_devfn_t dev, unsigned int where, uint8_t value)
{ {
unsigned addr; unsigned int addr;
#if !CONFIG_PCI_IO_CFG_EXT #if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where; addr = (dev>>4) | where;
#else #else
@ -69,9 +69,9 @@ void pci_io_write_config8(pci_devfn_t dev, unsigned where, uint8_t value)
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
void pci_io_write_config16(pci_devfn_t dev, unsigned where, uint16_t value) void pci_io_write_config16(pci_devfn_t dev, unsigned int where, uint16_t value)
{ {
unsigned addr; unsigned int addr;
#if !CONFIG_PCI_IO_CFG_EXT #if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where; addr = (dev>>4) | where;
#else #else
@ -82,9 +82,9 @@ void pci_io_write_config16(pci_devfn_t dev, unsigned where, uint16_t value)
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline))
void pci_io_write_config32(pci_devfn_t dev, unsigned where, uint32_t value) void pci_io_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value)
{ {
unsigned addr; unsigned int addr;
#if !CONFIG_PCI_IO_CFG_EXT #if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where; addr = (dev>>4) | where;
#else #else

4
src/arch/x86/include/arch/smp/atomic.h
View File

@ -55,7 +55,7 @@ typedef struct { volatile int counter; } atomic_t;
* Atomically increments v by 1. Note that the guaranteed * Atomically increments v by 1. Note that the guaranteed
* useful range of an atomic_t is only 24 bits. * useful range of an atomic_t is only 24 bits.
*/ */
static __inline__ __attribute__((always_inline)) void atomic_inc(atomic_t *v) static inline __attribute__((always_inline)) void atomic_inc(atomic_t *v)
{ {
__asm__ __volatile__( __asm__ __volatile__(
"lock ; incl %0" "lock ; incl %0"
@ -70,7 +70,7 @@ static __inline__ __attribute__((always_inline)) void atomic_inc(atomic_t *v)
* Atomically decrements v by 1. Note that the guaranteed * Atomically decrements v by 1. Note that the guaranteed
* useful range of an atomic_t is only 24 bits. * useful range of an atomic_t is only 24 bits.
*/ */
static __inline__ __attribute__((always_inline)) void atomic_dec(atomic_t *v) static inline __attribute__((always_inline)) void atomic_dec(atomic_t *v)
{ {
__asm__ __volatile__( __asm__ __volatile__(
"lock ; decl %0" "lock ; decl %0"

6
src/arch/x86/mpspec.c
View File

@ -157,9 +157,9 @@ void smp_write_processors(struct mp_config_table *mc)
{ {
int boot_apic_id; int boot_apic_id;
int order_id; int order_id;
unsigned apic_version; unsigned int apic_version;
unsigned cpu_features; unsigned int cpu_features;
unsigned cpu_feature_flags; unsigned int cpu_feature_flags;
struct cpuid_result result; struct cpuid_result result;
struct device *cpu; struct device *cpu;