diff --git a/src/soc/amd/common/psp_verstage/include/psp_verstage.h b/src/soc/amd/common/psp_verstage/include/psp_verstage.h
index e740332862..dd3d2b35ca 100644
--- a/src/soc/amd/common/psp_verstage/include/psp_verstage.h
+++ b/src/soc/amd/common/psp_verstage/include/psp_verstage.h
@@ -68,4 +68,6 @@ void platform_report_mode(int developer_mode_enabled);
 
 void update_psp_fw_hash_table(const char *fname);
 
+void report_hsp_secure_state(void);
+
 #endif /* PSP_VERSTAGE_H */
diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c
index 969c1c0863..33d92180c5 100644
--- a/src/soc/amd/common/psp_verstage/psp_verstage.c
+++ b/src/soc/amd/common/psp_verstage/psp_verstage.c
@@ -246,6 +246,9 @@ void Main(void)
 		svc_write_postcode(POSTCODE_CONSOLE_INIT);
 	console_init();
 
+	if (CONFIG(PSP_INCLUDES_HSP))
+		report_hsp_secure_state();
+
 	if (!CONFIG(PSP_POSTCODES_ON_ESPI))
 		svc_write_postcode(POSTCODE_EARLY_INIT);
 	retval = verstage_soc_early_init();
diff --git a/src/soc/amd/mendocino/psp_verstage/chipset.c b/src/soc/amd/mendocino/psp_verstage/chipset.c
index fe79979fbe..c892b19e30 100644
--- a/src/soc/amd/mendocino/psp_verstage/chipset.c
+++ b/src/soc/amd/mendocino/psp_verstage/chipset.c
@@ -2,6 +2,8 @@
 
 /* TODO: Check if this is still correct */
 
+#include <arch/hlt.h>
+#include <bl_uapp/bl_errorcodes_public.h>
 #include <bl_uapp/bl_syscall_public.h>
 #include <cbfs.h>
 #include <console/console.h>
@@ -113,3 +115,17 @@ void platform_report_mode(int developer_mode_enabled)
 	else
 		svc_set_platform_boot_mode(CHROME_BOOK_BOOT_MODE_NORMAL);
 }
+
+void report_hsp_secure_state(void)
+{
+	uint32_t hsp_secure_state;
+	int ret;
+
+	ret = svc_get_hsp_secure_state(&hsp_secure_state);
+	if (ret != BL_OK) {
+		printk(BIOS_ERR, "Error reading HSP Secure state: %d\n", ret);
+		hlt();
+	}
+
+	printk(BIOS_INFO, "HSP Secure state: %#8x\n", hsp_secure_state);
+}