From e64f5b1bcd589b4ac517909f5332f9926ab7d642 Mon Sep 17 00:00:00 2001
From: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Date: Sun, 4 Jan 2015 04:25:38 +1100
Subject: [PATCH] superio/intel/i3100: Use link-time symbol over .c includes
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Change-Id: I83db9b189e672b0e1f25bc42b73639c375bea3e5
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8054
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
---
 src/mainboard/intel/eagleheights/romstage.c |  2 +-
 src/mainboard/intel/mtarvon/romstage.c      |  1 -
 src/mainboard/intel/truxton/romstage.c      |  1 -
 src/superio/intel/i3100/Makefile.inc        |  1 +
 src/superio/intel/i3100/early_serial.c      |  6 ++++--
 src/superio/intel/i3100/i3100.h             | 12 +++++++++---
 6 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index c03c7d7301..b41e0c5cae 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -33,7 +33,7 @@
 #include "southbridge/intel/i3100/early_smbus.c"
 #include "southbridge/intel/i3100/early_lpc.c"
 #include "southbridge/intel/i3100/reset.c"
-#include "superio/intel/i3100/early_serial.c"
+#include <superio/intel/i3100/i3100.h>
 #include <superio/smsc/smscsuperio/smscsuperio.h>
 #include "northbridge/intel/i3100/i3100.h"
 #include "southbridge/intel/i3100/i3100.h"
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index 4691b5c0e8..959beab260 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -30,7 +30,6 @@
 #include "southbridge/intel/i3100/early_lpc.c"
 #include "northbridge/intel/i3100/raminit.h"
 #include <superio/intel/i3100/i3100.h>
-#include "superio/intel/i3100/early_serial.c"
 #include "northbridge/intel/i3100/memory_initialized.c"
 #include "cpu/x86/bist.h"
 #include <spd.h>
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index f75077833c..4c15f672a0 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -32,7 +32,6 @@
 #include "northbridge/intel/i3100/raminit_ep80579.h"
 #include <superio/intel/i3100/i3100.h>
 #include "cpu/x86/mtrr/earlymtrr.c"
-#include "superio/intel/i3100/early_serial.c"
 #include "lib/debug.c" // XXX
 #include "cpu/x86/bist.h"
 #include <spd.h>
diff --git a/src/superio/intel/i3100/Makefile.inc b/src/superio/intel/i3100/Makefile.inc
index dedd4198e5..22843982a8 100644
--- a/src/superio/intel/i3100/Makefile.inc
+++ b/src/superio/intel/i3100/Makefile.inc
@@ -18,4 +18,5 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 ##
 
+romstage-$(CONFIG_SUPERIO_INTEL_I3100) += early_serial.c
 ramstage-$(CONFIG_SUPERIO_INTEL_I3100) += superio.c
diff --git a/src/superio/intel/i3100/early_serial.c b/src/superio/intel/i3100/early_serial.c
index 96bb5501cf..0a3dc1128f 100644
--- a/src/superio/intel/i3100/early_serial.c
+++ b/src/superio/intel/i3100/early_serial.c
@@ -19,6 +19,8 @@
  */
 
 #include <arch/io.h>
+#include <device/pnp.h>
+#include <stdint.h>
 #include "i3100.h"
 
 static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
@@ -38,14 +40,14 @@ static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
 }
 
 /* Enable device interrupts, set UART_CLK predivide. */
-static void i3100_configure_uart_clk(pnp_devfn_t dev, u8 predivide)
+void i3100_configure_uart_clk(pnp_devfn_t dev, u8 predivide)
 {
 	pnp_enter_ext_func_mode(dev);
 	pnp_write_config(dev, I3100_SIW_CONFIGURATION, (predivide << 2) | 1);
 	pnp_exit_ext_func_mode(dev);
 }
 
-static void i3100_enable_serial(pnp_devfn_t dev, u16 iobase)
+void i3100_enable_serial(pnp_devfn_t dev, u16 iobase)
 {
 	pnp_enter_ext_func_mode(dev);
 	pnp_set_logical_device(dev);
diff --git a/src/superio/intel/i3100/i3100.h b/src/superio/intel/i3100/i3100.h
index 4b8bf27801..3f51a484ed 100644
--- a/src/superio/intel/i3100/i3100.h
+++ b/src/superio/intel/i3100/i3100.h
@@ -18,8 +18,8 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef SUPERIO_INTEL_I3100_I3100_H
-#define SUPERIO_INTEL_I3100_I3100_H
+#ifndef SUPERIO_INTEL_I3100_H
+#define SUPERIO_INTEL_I3100_H
 
 /*
  * Datasheet:
@@ -61,4 +61,10 @@
 #define I3100_UART_CLK_PREDIVIDE_8	0x01
 #define I3100_UART_CLK_PREDIVIDE_26	0x02
 
-#endif
+#include <arch/io.h>
+#include <stdint.h>
+
+void i3100_configure_uart_clk(pnp_devfn_t dev, u8 predivide);
+void i3100_enable_serial(pnp_devfn_t dev, u16 iobase);
+
+#endif /* SUPERIO_INTEL_I3100_H */