From e67513e353cd5fa5793e973cf0679a332d930e05 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Wed, 2 Aug 2023 19:52:45 +0200 Subject: [PATCH] drivers/uart/pl011: Fix regwidth MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Width of registers are always dwords on pl011, not bytes. Signed-off-by: Arthur Heymans Change-Id: I955319d31bba5c0cd4d50f2b34111d51fea653ed Reviewed-on: https://review.coreboot.org/c/coreboot/+/76883 Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai Reviewed-by: Kyösti Mälkki Reviewed-by: Paul Menzel --- src/drivers/uart/pl011.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c index 0661de174f..64c279d1b4 100644 --- a/src/drivers/uart/pl011.c +++ b/src/drivers/uart/pl011.c @@ -40,7 +40,7 @@ enum cb_err fill_lb_serial(struct lb_serial *serial) serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED; serial->baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial->baud = get_uart_baudrate(); - serial->regwidth = 1; + serial->regwidth = 4; serial->input_hertz = uart_platform_refclk(); return CB_SUCCESS;