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mb/siemens/mc_ehl*: Correct comment in gpio.c 

There were two wrong comments in all mc_ehl gpio.c files. This patch
corrects the incorrect comments.

Change-Id: Iea356db177227d89b91be32a4e2367c612b77350
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72458
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Mario Scheithauer 2023-01-26 09:48:43 +01:00 committed by Felix Held
parent b63b6c5ff5
commit e67f7be664
3 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/siemens/mc_ehl/variants/mc_ehl1/gpio.c
View File

@ -107,8 +107,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* PSE_GBE0_MDC */ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* PSE_GBE0_MDC */
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* PSE_GBE0_MDIO */ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* PSE_GBE0_MDIO */
PAD_NC(GPP_C5, NONE), /* Not connected */ PAD_NC(GPP_C5, NONE), /* Not connected */
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* PSE_GBE0_AUXTS */ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* PSE_GBE1_MDC */
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* PSE_GBE0_PPS */ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* PSE_GBE1_MDIO */
PAD_NC(GPP_C8, NONE), /* Not connected */ PAD_NC(GPP_C8, NONE), /* Not connected */
PAD_CFG_NF(GPP_C12, NONE, DEEP, NF4), /* SIO_UART1_RXD */ PAD_CFG_NF(GPP_C12, NONE, DEEP, NF4), /* SIO_UART1_RXD */
PAD_CFG_NF(GPP_C13, NONE, DEEP, NF4), /* SIO_UART1_TXD */ PAD_CFG_NF(GPP_C13, NONE, DEEP, NF4), /* SIO_UART1_TXD */

4
src/mainboard/siemens/mc_ehl/variants/mc_ehl2/gpio.c
View File

@ -108,8 +108,8 @@ static const struct pad_config gpio_table[] = {
/* Community 4 - GpioGroup GPP_C */ /* Community 4 - GpioGroup GPP_C */
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* PSE_GBE0_MDC */ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* PSE_GBE0_MDC */
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* PSE_GBE0_MDIO */ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* PSE_GBE0_MDIO */
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* PSE_GBE0_AUXTS */ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* PSE_GBE1_MDC */
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* PSE_GBE0_PPS */ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* PSE_GBE1_MDIO */
PAD_CFG_NF(GPP_C12, NONE, DEEP, NF4), /* SIO_UART1_RXD */ PAD_CFG_NF(GPP_C12, NONE, DEEP, NF4), /* SIO_UART1_RXD */
PAD_CFG_NF(GPP_C13, NONE, DEEP, NF4), /* SIO_UART1_TXD */ PAD_CFG_NF(GPP_C13, NONE, DEEP, NF4), /* SIO_UART1_TXD */
PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* GBE_MDIO */ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* GBE_MDIO */

4
src/mainboard/siemens/mc_ehl/variants/mc_ehl4/gpio.c
View File

@ -107,8 +107,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* PSE_GBE0_MDC */ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* PSE_GBE0_MDC */
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* PSE_GBE0_MDIO */ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* PSE_GBE0_MDIO */
PAD_NC(GPP_C5, NONE), /* Not connected */ PAD_NC(GPP_C5, NONE), /* Not connected */
PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* PSE_GBE0_AUXTS */ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* PSE_GBE1_MDC */
PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* PSE_GBE0_PPS */ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* PSE_GBE1_MDIO */
PAD_NC(GPP_C8, NONE), /* Not connected */ PAD_NC(GPP_C8, NONE), /* Not connected */
PAD_CFG_NF(GPP_C12, NONE, DEEP, NF4), /* SIO_UART1_RXD */ PAD_CFG_NF(GPP_C12, NONE, DEEP, NF4), /* SIO_UART1_RXD */
PAD_CFG_NF(GPP_C13, NONE, DEEP, NF4), /* SIO_UART1_TXD */ PAD_CFG_NF(GPP_C13, NONE, DEEP, NF4), /* SIO_UART1_TXD */