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soc/intel/tigerlake: Print HPR_CAUSE0 register 

In addition to GBLRST_CAUSE0 and GBLRST_CAUSE1, print the value
of HPR_CAUSE0.

Change-Id: Idc57c3cd6a8d156c5544640898e8e7147d34c535
Signed-off-by: derek.huang <derek.huang@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40648
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
derek.huang 2020-04-23 14:55:24 +08:00 committed by Patrick Georgi
parent 18e632f8b3
commit e685107dd6
3 changed files with 8 additions and 0 deletions
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1
src/soc/intel/tigerlake/include/soc/pm.h
View File

@ -150,6 +150,7 @@ struct chipset_power_state {
uint32_t gen_pmcon_a; uint32_t gen_pmcon_a;
uint32_t gen_pmcon_b; uint32_t gen_pmcon_b;
uint32_t gblrst_cause[2]; uint32_t gblrst_cause[2];
uint32_t hpr_cause0;
uint32_t prev_sleep_state; uint32_t prev_sleep_state;
} __packed; } __packed;

4
src/soc/intel/tigerlake/include/soc/pmc.h
View File

@ -119,6 +119,10 @@
#define GBLRST_CAUSE0 0x1924 #define GBLRST_CAUSE0 0x1924
#define GBLRST_CAUSE0_THERMTRIP (1 << 5) #define GBLRST_CAUSE0_THERMTRIP (1 << 5)
#define GBLRST_CAUSE1 0x1928 #define GBLRST_CAUSE1 0x1928
#define HPR_CAUSE0 0x192C
#define HPR_CAUSE0_MI_HRPD (1 << 10)
#define HPR_CAUSE0_MI_HRPC (1 << 9)
#define HPR_CAUSE0_MI_HR (1 << 8)
#define CPPMVRIC 0x1B1C #define CPPMVRIC 0x1B1C
#define XTALSDQDIS (1 << 22) #define XTALSDQDIS (1 << 22)

3
src/soc/intel/tigerlake/pmutil.c
View File

@ -260,12 +260,15 @@ void soc_fill_power_state(struct chipset_power_state *ps)
ps->gen_pmcon_b = read32(pmc + GEN_PMCON_B); ps->gen_pmcon_b = read32(pmc + GEN_PMCON_B);
ps->gblrst_cause[0] = read32(pmc + GBLRST_CAUSE0); ps->gblrst_cause[0] = read32(pmc + GBLRST_CAUSE0);
ps->gblrst_cause[1] = read32(pmc + GBLRST_CAUSE1); ps->gblrst_cause[1] = read32(pmc + GBLRST_CAUSE1);
ps->hpr_cause0 = read32(pmc + HPR_CAUSE0);
printk(BIOS_DEBUG, "GEN_PMCON: %08x %08x\n", printk(BIOS_DEBUG, "GEN_PMCON: %08x %08x\n",
ps->gen_pmcon_a, ps->gen_pmcon_b); ps->gen_pmcon_a, ps->gen_pmcon_b);
printk(BIOS_DEBUG, "GBLRST_CAUSE: %08x %08x\n", printk(BIOS_DEBUG, "GBLRST_CAUSE: %08x %08x\n",
ps->gblrst_cause[0], ps->gblrst_cause[1]); ps->gblrst_cause[0], ps->gblrst_cause[1]);
printk(BIOS_DEBUG, "HPR_CAUSE0: %08x\n", ps->hpr_cause0);
} }
/* STM Support */ /* STM Support */