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nb/intel/pineview: Use cbfs mcache 

There is plenty of cache available to increase DCACHE_RAM_SIZE to
allow the use of cbfs mcache.

Tested on Gigabyte GA-D510UD, still boots and resumes.

Change-Id: I1487ba9decd3aa22424a3ac111de7fbdb867d38d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52941
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Arthur Heymans 2021-05-05 14:45:28 +02:00
parent 6afd3c1cea
commit e69461dc25
2 changed files with 1 additions and 2 deletions
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2
src/cpu/intel/socket_FCBGA559/Kconfig
View File

@ -17,7 +17,7 @@ config DCACHE_RAM_BASE
config DCACHE_RAM_SIZE
hex
default 0x4000
default 0x8000
config DCACHE_BSP_STACK_SIZE
hex

1
src/northbridge/intel/pineview/Kconfig
View File

@ -13,7 +13,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS
select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
select INTEL_EDID if MAINBOARD_DO_NATIVE_VGA_INIT
select INTEL_GMA_ACPI
select NO_CBFS_MCACHE
config VGA_BIOS_ID
string