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pcengines/apu1: 64bit fixes 

Change-Id: Iacad070f43534a8b27a2473a6a2854bc2f6e607a
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10598
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
This commit is contained in:
Stefan Reinauer 2015-06-19 15:54:00 -07:00
parent 11186dd7e7
commit e6946c626a
2 changed files with 8 additions and 8 deletions
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10
src/mainboard/pcengines/apu1/gpio_ftns.c
View File

@ -23,10 +23,10 @@
#include <southbridge/amd/cimx/cimx_util.h>
#include "gpio_ftns.h"
u32 find_gpio_base(void)
uintptr_t find_gpio_base(void)
{
u8 pm_index, pm_data;
u32 base_addr = 0;
uintptr_t base_addr = 0;
/* Find the ACPImmioAddr base address */
for ( pm_index = 0x27; pm_index > 0x23; pm_index-- ) {
@ -39,7 +39,7 @@ u32 find_gpio_base(void)
return (base_addr);
}
void configure_gpio(u32 base_addr, u32 gpio, u8 iomux_ftn, u8 setting)
void configure_gpio(uintptr_t base_addr, u32 gpio, u8 iomux_ftn, u8 setting)
{
u8 bdata;
u8 *memptr;
@ -54,7 +54,7 @@ void configure_gpio(u32 base_addr, u32 gpio, u8 iomux_ftn, u8 setting)
*memptr = bdata;
}
u8 read_gpio(u32 base_addr, u32 gpio)
u8 read_gpio(uintptr_t base_addr, u32 gpio)
{
u8 *memptr = (u8 *)(base_addr + GPIO_OFFSET + gpio);
return (*memptr & GPIO_DATA_IN) ? 1 : 0;
@ -62,7 +62,7 @@ u8 read_gpio(u32 base_addr, u32 gpio)
int get_spd_offset(void)
{
u32 base_addr = find_gpio_base();
uintptr_t base_addr = find_gpio_base();
u8 spd_offset = read_gpio(base_addr, GPIO_16);
return spd_offset;
}

6
src/mainboard/pcengines/apu1/gpio_ftns.h
View File

@ -20,9 +20,9 @@
#ifndef GPIO_FTNS_H
#define GPIO_FTNS_H
u32 find_gpio_base(void);
void configure_gpio(u32 base_addr, u32 gpio, u8 iomux_ftn, u8 setting);
u8 read_gpio(u32 base_addr, u32 gpio);
uintptr_t find_gpio_base(void);
void configure_gpio(uintptr_t base_addr, u32 gpio, u8 iomux_ftn, u8 setting);
u8 read_gpio(uintptr_t base_addr, u32 gpio);
int get_spd_offset(void);
#define IOMUX_OFFSET 0xD00