From e6a491e782a2abdddd035b370ab9cc3165f5230c Mon Sep 17 00:00:00 2001 From: Maxim Polyakov Date: Wed, 26 Jun 2019 11:17:37 +0300 Subject: [PATCH] mb/asrock/h110m: set serirq_mode to continuous mode By default, the LPC SIRQ mode is set to Quiet mode. Therefore, COM-port from the SurerIO chip don't work correctly after the LPC controller (PCI 0:1f.0) initialization. Console output is broken. The patch fixes this bug by overriding the serirq_mode option in the devicetree.cb to set Continuous SIRQ mode Change-Id: I37e26b271fb61f6c0343d6bf65c029924df82caf Signed-off-by: Maxim Polyakov Reviewed-on: https://review.coreboot.org/c/coreboot/+/33801 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/mainboard/asrock/h110m/devicetree.cb | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index 158801f118..3067ffe53c 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -62,6 +62,9 @@ chip soc/intel/skylake register "pirqg_routing" = "PCH_IRQ11" register "pirqh_routing" = "PCH_IRQ11" + # Set LPC Serial IRQ mode + register "serirq_mode" = "SERIRQ_CONTINUOUS" + # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s register "PmConfigSlpS3MinAssert" = "0x02"