soc/intel/apollolake: Add functions to calculate GPIO address

Provide iosf and GPIO functions for GPIO address
calculation.

BUG=chrome-os-partner:55877

Change-Id: I6eaa1fcecf5970b365e3418541c75b9866959f7e
Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com>
Reviewed-on: https://review.coreboot.org/16349
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Vaibhav Shankar 2016-08-29 14:03:38 -07:00 committed by Martin Roth
parent 6e4204a0d1
commit e6a5f608e1
3 changed files with 20 additions and 5 deletions

View File

@ -177,6 +177,16 @@ void gpio_configure_pads(const struct pad_config *cfg, size_t num_pads)
gpio_configure_pad(cfg + i);
}
void * gpio_dwx_address(const uint16_t pad)
{
/* Calculate Address of DW0 register for given GPIO
* pad - GPIO number
* returns - address of GPIO
*/
const struct pad_community *comm = gpio_get_community(pad);
return iosf_address(comm->port, PAD_CFG_OFFSET(pad - comm->first_pad));
}
void gpio_input_pulldown(gpio_t gpio)
{
struct pad_config cfg = PAD_CFG_GPI(gpio, DN_20K, DEEP);

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@ -160,6 +160,8 @@ struct pad_config {
void gpio_configure_pad(const struct pad_config *cfg);
void gpio_configure_pads(const struct pad_config *cfg, size_t num_pads);
/* Calculate GPIO DW0 address */
void * gpio_dwx_address(const uint16_t pad);
/*
* Set the GPIO groups for the GPE blocks. The values from PMC register GPE_CFG
* are passed which is then mapped to proper groups for MISCCFG. This basically

View File

@ -24,16 +24,19 @@
#define RTC_CONFIG 0x3400
#define RTC_CONFIG_UCMOS_ENABLE (1 << 2)
static inline void * iosf_address(uint16_t port, uint16_t reg)
{
uintptr_t addr = (CONFIG_IOSF_BASE_ADDRESS | (port << 16) | (reg & ~3));
return (void *)addr;
}
inline static void iosf_write(uint16_t port, uint16_t reg, uint32_t val)
{
uintptr_t base = CONFIG_IOSF_BASE_ADDRESS | (port << 16) | (reg & ~3);
write32((void *)base, val);
write32(iosf_address(port, reg), val);
}
inline static uint32_t iosf_read(uint16_t port, uint16_t reg)
{
uintptr_t base = CONFIG_IOSF_BASE_ADDRESS | (port << 16) | (reg & ~3);
return read32((void *)base);
return read32(iosf_address(port, reg));
}
#endif /* _SOC_APOLLOLAKE_IOSF_H_ */