nb/intel/*/gma.c: Skip NGI when VGA decode is not enabled
Writes to VGA MEM and IO by NGI are invalid if the IGD is not decoding them. Change-Id: I4b9329d14105eb563a0d4aea6ef75ff11febf6df Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/27984 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -771,11 +771,18 @@ static void gma_func0_init(struct device *dev)
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/* Post VBIOS init */
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gma_pm_init_post_vbios(dev, edid_lvds.ascii_string);
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if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) {
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gma_ngi(dev, &edid_lvds);
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} else if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
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int lightup_ok;
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gma_gfxinit(&lightup_ok);
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int vga_disable = (pci_read_config16(dev, D0F0_GGC) & 2) >> 1;
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if (vga_disable) {
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printk(BIOS_INFO,
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"IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");
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} else {
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if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) {
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gma_ngi(dev, &edid_lvds);
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} else if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
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int lightup_ok;
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gma_gfxinit(&lightup_ok);
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}
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}
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intel_gma_restore_opregion();
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@ -468,10 +468,17 @@ static void gma_func0_init(struct device *dev)
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/* Pre panel init */
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gma_setup_panel(dev);
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int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;
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if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
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printk(BIOS_SPEW, "NATIVE graphics, run native enable\n");
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gma_gfxinit(&lightup_ok);
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gfx_set_init_done(1);
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if (vga_disable) {
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printk(BIOS_INFO,
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"IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");
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} else {
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printk(BIOS_SPEW, "NATIVE graphics, run native enable\n");
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gma_gfxinit(&lightup_ok);
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gfx_set_init_done(1);
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}
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}
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if (! lightup_ok) {
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@ -700,12 +700,20 @@ static void gma_func0_init(struct device *dev)
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pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER
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| PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
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int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;
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if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) {
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if (acpi_is_wakeup_s3())
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if (acpi_is_wakeup_s3()) {
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printk(BIOS_INFO,
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"Skipping native VGA initialization when resuming from ACPI S3.\n");
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else
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gma_ngi(dev);
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} else {
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if (vga_disable) {
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printk(BIOS_INFO,
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"IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");
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} else {
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gma_ngi(dev);
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}
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}
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} else {
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/* PCI Init, will run VBIOS */
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pci_dev_init(dev);
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@ -275,6 +275,8 @@ static void gma_func0_init(struct device *dev)
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struct resource *pio_res;
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struct northbridge_intel_pineview_config *conf = dev->chip_info;
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int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;
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/* Find base addresses */
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mmio_res = find_resource(dev, 0x10);
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gtt_res = find_resource(dev, 0x1c);
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@ -282,11 +284,17 @@ static void gma_func0_init(struct device *dev)
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physbase = pci_read_config32(dev, 0x5c) & ~0xf;
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if (gtt_res && gtt_res->base && physbase && pio_res && pio_res->base) {
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printk(BIOS_SPEW, "Initializing VGA. MMIO 0x%llx\n",
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mmio_res->base);
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intel_gma_init(conf, dev, res2mmio(mmio_res, 0, 0),
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res2mmio(gtt_res, 0, 0),
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physbase, pio_res->base);
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if (vga_disable) {
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printk(BIOS_INFO,
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"IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");
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} else {
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printk(BIOS_SPEW, "Initializing VGA. MMIO 0x%llx\n",
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mmio_res->base);
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intel_gma_init(conf, dev,
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res2mmio(mmio_res, 0, 0),
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res2mmio(gtt_res, 0, 0),
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physbase, pio_res->base);
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}
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}
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/* Linux relies on VBT for panel info. */
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@ -631,29 +631,38 @@ static void gma_func0_init(struct device *dev)
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/* Post VBIOS init */
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gma_pm_init_post_vbios(dev);
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int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;
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/* Running graphics init on S3 breaks Linux drm driver. */
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if (!acpi_is_wakeup_s3() &&
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(IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) ||
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IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT))) {
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/* This should probably run before post VBIOS init. */
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printk(BIOS_SPEW, "Initializing VGA without OPROM.\n");
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u8 *mmiobase;
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u32 iobase, physbase, graphics_base;
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struct northbridge_intel_sandybridge_config *conf = dev->chip_info;
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iobase = dev->resource_list[2].base;
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mmiobase = res2mmio(&dev->resource_list[0], 0, 0);
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physbase = pci_read_config32(dev, 0x5c) & ~0xf;
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graphics_base = dev->resource_list[1].base;
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int lightup_ok;
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if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
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gma_gfxinit(&lightup_ok);
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if (vga_disable) {
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printk(BIOS_INFO,
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"IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");
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} else {
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lightup_ok = i915lightup_sandy(&conf->gfx, physbase,
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iobase, mmiobase, graphics_base);
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/* This should probably run before post VBIOS init. */
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printk(BIOS_SPEW, "Initializing VGA without OPROM.\n");
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u8 *mmiobase;
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u32 iobase, physbase, graphics_base;
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struct northbridge_intel_sandybridge_config *conf = dev->chip_info;
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iobase = dev->resource_list[2].base;
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mmiobase = res2mmio(&dev->resource_list[0], 0, 0);
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physbase = pci_read_config32(dev, 0x5c) & ~0xf;
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graphics_base = dev->resource_list[1].base;
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int lightup_ok;
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if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
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gma_gfxinit(&lightup_ok);
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} else {
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lightup_ok = i915lightup_sandy(&conf->gfx,
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physbase,
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iobase, mmiobase,
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graphics_base);
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}
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if (lightup_ok)
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gfx_set_init_done(1);
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}
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if (lightup_ok)
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gfx_set_init_done(1);
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}
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gma_enable_swsci();
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@ -60,7 +60,7 @@ void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb)
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static void gma_func0_init(struct device *dev)
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{
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u16 reg16, ggc;
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u16 reg16;
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u32 reg32;
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/* IGD needs to be Bus Master */
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@ -74,11 +74,16 @@ static void gma_func0_init(struct device *dev)
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reg16 |= 0xbc;
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pci_write_config16(dev_find_slot(0, PCI_DEVFN(0x2, 0)), 0xcc, reg16);
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ggc = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0, 0)), D0F0_GGC);
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int vga_disable = pci_read_config16(dev, D0F0_GGC);
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if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
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int lightup_ok;
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gma_gfxinit(&lightup_ok);
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if (vga_disable) {
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printk(BIOS_INFO,
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"IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");
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} else {
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int lightup_ok;
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gma_gfxinit(&lightup_ok);
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}
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} else {
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pci_dev_init(dev);
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}
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