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nb/intel/*/gma.c: Skip NGI when VGA decode is not enabled 

Writes to VGA MEM and IO by NGI are invalid if the IGD is not decoding
them.

Change-Id: I4b9329d14105eb563a0d4aea6ef75ff11febf6df
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/27984
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Arthur Heymans 2018-08-09 11:31:51 +02:00 committed by Felix Held
parent db2f91b1f7
commit e6c8f7ec20
6 changed files with 81 additions and 37 deletions
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7
src/northbridge/intel/gm45/gma.c
View File

@ -771,12 +771,19 @@ static void gma_func0_init(struct device *dev)
/* Post VBIOS init */
gma_pm_init_post_vbios(dev, edid_lvds.ascii_string);
int vga_disable = (pci_read_config16(dev, D0F0_GGC) & 2) >> 1;
if (vga_disable) {
printk(BIOS_INFO,
"IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");
} else {
if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) {
gma_ngi(dev, &edid_lvds);
} else if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
int lightup_ok;
gma_gfxinit(&lightup_ok);
}
}
intel_gma_restore_opregion();
}

7
src/northbridge/intel/haswell/gma.c
View File

@ -468,11 +468,18 @@ static void gma_func0_init(struct device *dev)
/* Pre panel init */
gma_setup_panel(dev);
int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;
if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
if (vga_disable) {
printk(BIOS_INFO,
"IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");
} else {
printk(BIOS_SPEW, "NATIVE graphics, run native enable\n");
gma_gfxinit(&lightup_ok);
gfx_set_init_done(1);
}
}
if (! lightup_ok) {
printk(BIOS_SPEW, "FUI did not run; using VBIOS\n");

12
src/northbridge/intel/i945/gma.c
View File

@ -700,12 +700,20 @@ static void gma_func0_init(struct device *dev)
pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER
| PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;
if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) {
if (acpi_is_wakeup_s3())
if (acpi_is_wakeup_s3()) {
printk(BIOS_INFO,
"Skipping native VGA initialization when resuming from ACPI S3.\n");
else
} else {
if (vga_disable) {
printk(BIOS_INFO,
"IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");
} else {
gma_ngi(dev);
}
}
} else {
/* PCI Init, will run VBIOS */
pci_dev_init(dev);

10
src/northbridge/intel/pineview/gma.c
View File

@ -275,6 +275,8 @@ static void gma_func0_init(struct device *dev)
struct resource *pio_res;
struct northbridge_intel_pineview_config *conf = dev->chip_info;
int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;
/* Find base addresses */
mmio_res = find_resource(dev, 0x10);
gtt_res = find_resource(dev, 0x1c);
@ -282,12 +284,18 @@ static void gma_func0_init(struct device *dev)
physbase = pci_read_config32(dev, 0x5c) & ~0xf;
if (gtt_res && gtt_res->base && physbase && pio_res && pio_res->base) {
if (vga_disable) {
printk(BIOS_INFO,
"IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");
} else {
printk(BIOS_SPEW, "Initializing VGA. MMIO 0x%llx\n",
mmio_res->base);
intel_gma_init(conf, dev, res2mmio(mmio_res, 0, 0),
intel_gma_init(conf, dev,
res2mmio(mmio_res, 0, 0),
res2mmio(gtt_res, 0, 0),
physbase, pio_res->base);
}
}
/* Linux relies on VBT for panel info. */
generate_fake_intel_oprom(&conf->gfx, dev, "$VBT PINEVIEW");

13
src/northbridge/intel/sandybridge/gma.c
View File

@ -631,10 +631,16 @@ static void gma_func0_init(struct device *dev)
/* Post VBIOS init */
gma_pm_init_post_vbios(dev);
int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;
/* Running graphics init on S3 breaks Linux drm driver. */
if (!acpi_is_wakeup_s3() &&
(IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) ||
IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT))) {
if (vga_disable) {
printk(BIOS_INFO,
"IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");
} else {
/* This should probably run before post VBIOS init. */
printk(BIOS_SPEW, "Initializing VGA without OPROM.\n");
u8 *mmiobase;
@ -649,12 +655,15 @@ static void gma_func0_init(struct device *dev)
if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
gma_gfxinit(&lightup_ok);
} else {
lightup_ok = i915lightup_sandy(&conf->gfx, physbase,
iobase, mmiobase, graphics_base);
lightup_ok = i915lightup_sandy(&conf->gfx,
physbase,
iobase, mmiobase,
graphics_base);
}
if (lightup_ok)
gfx_set_init_done(1);
}
}
gma_enable_swsci();
intel_gma_restore_opregion();

9
src/northbridge/intel/x4x/gma.c
View File

@ -60,7 +60,7 @@ void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb)
static void gma_func0_init(struct device *dev)
{
u16 reg16, ggc;
u16 reg16;
u32 reg32;
/* IGD needs to be Bus Master */
@ -74,11 +74,16 @@ static void gma_func0_init(struct device *dev)
reg16 |= 0xbc;
pci_write_config16(dev_find_slot(0, PCI_DEVFN(0x2, 0)), 0xcc, reg16);
ggc = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0, 0)), D0F0_GGC);
int vga_disable = pci_read_config16(dev, D0F0_GGC);
if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
if (vga_disable) {
printk(BIOS_INFO,
"IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");
} else {
int lightup_ok;
gma_gfxinit(&lightup_ok);
}
} else {
pci_dev_init(dev);
}