cpu/x86/smm: Add weak SoC init and exit methods

This change provides hooks for the SoC so it can perform any
initialization and cleanup in the SMM handler.

For example, if we have a UART enabled firmware with DEBUG_SMI, the UART
controller could have been powered off by the OS. In this case we need
to power on the UART when entering SMM, and then power it off before we
exit. If the OS had the UART enabled when entering SMM, we should
snapshot the UART register state, and restore it on exit. Otherwise we
risk clearing some interrupt enable bits.

BUG=b:221231786, b:217968734
TEST=Build test guybrush

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I946619cd62a974a98c575a92943b43ea639fc329
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62500
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

src/cpu/x86/smm/smm_module_handler.c

@@ -157,6 +157,8 @@ asmlinkage void smm_handler_start(void *arg)
 
 	smi_backup_pci_address();
 
+	smm_soc_early_init();
+
 	console_init();
 
 	printk(BIOS_SPEW, "\nSMI# #%d\n", cpu);
@@ -186,6 +188,8 @@ asmlinkage void smm_handler_start(void *arg)
 			die("SMM Handler caused a stack overflow\n");
 	}
 
+	smm_soc_exit();
+
 	smi_release_lock();
 
 	/* De-assert SMI# signal to allow another SMI */
@@ -206,3 +210,6 @@ void __weak mainboard_smi_gpi(u32 gpi_sts) {}
 int __weak mainboard_smi_apmc(u8 data) { return 0; }
 void __weak mainboard_smi_sleep(u8 slp_typ) {}
 void __weak mainboard_smi_finalize(void) {}
+
+void __weak smm_soc_early_init(void) {}
+void __weak smm_soc_exit(void) {}

src/include/cpu/x86/smm.h

@@ -51,6 +51,9 @@ int  mainboard_smi_apmc(u8 data);
 void mainboard_smi_sleep(u8 slp_typ);
 void mainboard_smi_finalize(void);
 
+void smm_soc_early_init(void);
+void smm_soc_exit(void);
+
 /* This is the SMM handler. */
 extern unsigned char _binary_smm_start[];
 extern unsigned char _binary_smm_end[];