util/inteltool: ahci: add code for dumping config and SIR registers
This adds the code required to dump config and SIR registers. Change-Id: I3726c52d415ff4dd6b19513b310f11254f7fbf92 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39560 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -60,6 +60,11 @@ static void print_port(const uint8_t *const mmio, size_t port)
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int print_ahci(struct pci_dev *ahci)
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{
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size_t ahci_registers_size = 0, i;
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size_t ahci_cfg_registers_size = 0;
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const io_register_t *ahci_cfg_registers;
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size_t ahci_sir_offset = 0;
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size_t ahci_sir_registers_size = 0;
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const io_register_t *ahci_sir_registers;
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if (!ahci) {
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puts("No SATA device found");
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@ -76,6 +81,55 @@ int print_ahci(struct pci_dev *ahci)
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ahci_registers_size = 0x400;
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}
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printf("\n============= AHCI Configuration Registers ==============\n\n");
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for (i = 0; i < ahci_cfg_registers_size; i++) {
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switch (ahci_cfg_registers[i].size) {
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case 4:
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printf("0x%04x: 0x%08x (%s)\n",
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ahci_cfg_registers[i].addr,
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pci_read_long(ahci, ahci_cfg_registers[i].addr),
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ahci_cfg_registers[i].name);
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break;
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case 2:
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printf("0x%04x: 0x%04x (%s)\n",
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ahci_cfg_registers[i].addr,
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pci_read_word(ahci, ahci_cfg_registers[i].addr),
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ahci_cfg_registers[i].name);
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break;
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case 1:
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printf("0x%04x: 0x%02x (%s)\n",
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ahci_cfg_registers[i].addr,
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pci_read_byte(ahci, ahci_cfg_registers[i].addr),
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ahci_cfg_registers[i].name);
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break;
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}
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}
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printf("\n============= SATA Initialization Registers ==============\n\n");
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for (i = 0; i < ahci_sir_registers_size; i++) {
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pci_write_byte(ahci, ahci_sir_offset, ahci_sir_registers[i].addr);
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switch (ahci_sir_registers[i].size) {
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case 4:
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printf("0x%02x: 0x%08x (%s)\n",
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ahci_sir_registers[i].addr,
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pci_read_long(ahci, ahci_sir_offset),
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ahci_sir_registers[i].name);
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break;
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case 2:
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printf("0x%02x: 0x%04x (%s)\n",
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ahci_sir_registers[i].addr,
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pci_read_word(ahci, ahci_sir_offset),
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ahci_sir_registers[i].name);
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break;
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case 1:
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printf("0x%02x: 0x%02x (%s)\n",
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ahci_sir_registers[i].addr,
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pci_read_byte(ahci, ahci_sir_offset),
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ahci_sir_registers[i].name);
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break;
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}
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}
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const pciaddr_t ahci_phys = ahci->base_addr[5] & ~0x7ULL;
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printf("\n============= ABAR ==============\n\n");
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printf("ABAR = 0x%08llx (MEM)\n\n", (unsigned long long)ahci_phys);
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