soc/intel/common: Adjust LPC Generic IO setup
Check same IO ranges get programmed first, if so just skip it to avoid double programming. BUG=b:77944335 TEST=Boot up with mewoth board, and check serial log, there's no error message about "LPC: Cannot Open IO Window: ". Change-Id: I89f9bb70320f91b16c6084384c4a0a53ede3760c Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/25667 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -65,7 +65,7 @@ void lpc_close_pmio_windows(void)
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void lpc_open_pmio_window(uint16_t base, uint16_t size)
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{
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int lgir_reg_num;
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int i, lgir_reg_num;
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uint32_t lgir_reg_offset, lgir, window_size, alignment;
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resource_t bridged_size, bridge_base;
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@ -76,16 +76,6 @@ void lpc_open_pmio_window(uint16_t base, uint16_t size)
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bridge_base = base;
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while (bridged_size < size) {
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lgir_reg_num = find_unused_pmio_window();
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if (lgir_reg_num < 0) {
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printk(BIOS_ERR,
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"LPC: Cannot open IO window: %llx size %llx\n",
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bridge_base, size - bridged_size);
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printk(BIOS_ERR, "No more IO windows\n");
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return;
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}
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lgir_reg_offset = LPC_GENERIC_IO_RANGE(lgir_reg_num);
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/* Each IO range register can only open a 256-byte window. */
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window_size = MIN(size, LPC_LGIR_MAX_WINDOW_SIZE);
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@ -97,6 +87,23 @@ void lpc_open_pmio_window(uint16_t base, uint16_t size)
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lgir = (bridge_base & LPC_LGIR_ADDR_MASK) | LPC_LGIR_EN;
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lgir |= ((window_size - 1) << 16) & LPC_LGIR_AMASK_MASK;
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/* Skip programming if same range already programmed. */
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for (i = 0; i < LPC_NUM_GENERIC_IO_RANGES; i++) {
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if (lgir == pci_read_config32(PCH_DEV_LPC,
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LPC_GENERIC_IO_RANGE(i)))
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return;
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}
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lgir_reg_num = find_unused_pmio_window();
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if (lgir_reg_num < 0) {
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printk(BIOS_ERR,
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"LPC: Cannot open IO window: %llx size %llx\n",
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bridge_base, size - bridged_size);
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printk(BIOS_ERR, "No more IO windows\n");
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return;
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}
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lgir_reg_offset = LPC_GENERIC_IO_RANGE(lgir_reg_num);
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pci_write_config32(PCH_DEV_LPC, lgir_reg_offset, lgir);
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printk(BIOS_DEBUG,
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