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mb/google/poppy/variants/nocturne: Add tdp_pl1_override value 

Add tdp_pl1_override value as 7W.

BUG=None
BRANCH=None
TEST=Build coreboot for Nocturne board

Change-Id: I16d3894da68bc3be6eff526062f9a88ef2df60c7
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/28708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Puthikorn Voravootivat <puthik@chromium.org>
This commit is contained in:
Sumeet Pawnikar 2018-09-21 14:59:22 +05:30 committed by Furquan Shaikh
parent aa69e2859d
commit e6e84f1ea9
1 changed files with 1 additions and 0 deletions
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src/mainboard/google/poppy/variants/nocturne/devicetree.cb
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@ -66,6 +66,7 @@ chip soc/intel/skylake
# Set speed_shift_enable to 1 to enable P-States, and 0 to disable
register "speed_shift_enable" = "1"
register "tdp_pl1_override" = "7"
register "tdp_pl2_override" = "18"
register "psys_pmax" = "45"
register "tcc_offset" = "10"