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intel/broadwell: Fix refcode handling 

Allow adding and executing a refcode binary.

Change-Id: I00e91a088a5695b42528e246d0ed642d988603e3
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/10638
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Patrick Georgi 2015-06-22 22:26:45 +02:00
parent f1db074bc4
commit e6e94934e8
2 changed files with 20 additions and 2 deletions
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18
src/soc/intel/broadwell/Kconfig
View File

@ -200,6 +200,24 @@ config SERIRQ_CONTINUOUS_MODE
help
If you set this option to y, the serial IRQ machine will be
operated in continuous mode.
config HAVE_REFCODE_BLOB
depends on ARCH_X86
bool "An external reference code blob should be put into cbfs."
default n
help
The reference code blob will be placed into cbfs.
if HAVE_REFCODE_BLOB
config REFCODE_BLOB_FILE
string "Path and filename to reference code blob."
default "refcode.elf"
help
The path and filename to the file to be added to cbfs.
endif # HAVE_REFCODE_BLOB
config HAVE_ME_BIN
bool "Add Intel Management Engine firmware"
default y

4
src/soc/intel/broadwell/refcode.c
View File

@ -43,7 +43,7 @@ static pei_wrapper_entry_t load_refcode_from_cache(void)
return (pei_wrapper_entry_t)prog_entry(&refcode);
}
static efi_wrapper_entry_t load_reference_code(void)
static pei_wrapper_entry_t load_reference_code(void)
{
struct prog prog =
PROG_INIT(ASSET_REFCODE, CONFIG_CBFS_PREFIX "/refcode");
@ -69,7 +69,7 @@ static efi_wrapper_entry_t load_reference_code(void)
/* Cache loaded reference code. */
stage_cache_add(STAGE_REFCODE, &prog);
return prog_entry(&prog);
return (pei_wrapper_entry_t)prog_entry(&prog);
}
void broadwell_run_reference_code(void)