diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index cb9c4c6e7c..6a66b4c564 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -445,6 +445,12 @@ u32 pm_read32(u8 reg);
 void pm_write8(u8 reg, u8 value);
 void pm_write16(u8 reg, u16 value);
 void pm_write32(u8 reg, u32 value);
+u8 acpi_read8(u8 reg);
+u16 acpi_read16(u8 reg);
+u32 acpi_read32(u8 reg);
+void acpi_write8(u8 reg, u8 value);
+void acpi_write16(u8 reg, u16 value);
+void acpi_write32(u8 reg, u32 value);
 u32 misc_read32(u8 reg);
 void misc_write32(u8 reg, u32 value);
 uint8_t smi_read8(uint8_t offset);
diff --git a/src/soc/amd/stoneyridge/sb_util.c b/src/soc/amd/stoneyridge/sb_util.c
index 9daf0bbf8d..ccbde7e5d9 100644
--- a/src/soc/amd/stoneyridge/sb_util.c
+++ b/src/soc/amd/stoneyridge/sb_util.c
@@ -56,6 +56,36 @@ u32 pm_read32(u8 reg)
 	return read32((void *)(PM_MMIO_BASE + reg));
 }
 
+u8 acpi_read8(u8 reg)
+{
+	return read8((void *)(ACPI_REG_MMIO_BASE + reg));
+}
+
+u16 acpi_read16(u8 reg)
+{
+	return read16((void *)(ACPI_REG_MMIO_BASE + reg));
+}
+
+u32 acpi_read32(u8 reg)
+{
+	return read32((void *)(ACPI_REG_MMIO_BASE + reg));
+}
+
+void acpi_write8(u8 reg, u8 value)
+{
+	write8((void *)(ACPI_REG_MMIO_BASE + reg), value);
+}
+
+void acpi_write16(u8 reg, u16 value)
+{
+	write16((void *)(ACPI_REG_MMIO_BASE + reg), value);
+}
+
+void acpi_write32(u8 reg, u32 value)
+{
+	write32((void *)(ACPI_REG_MMIO_BASE + reg), value);
+}
+
 void smi_write32(uint8_t offset, uint32_t value)
 {
 	write32((void *)(APU_SMI_BASE + offset), value);