binaryPI: Use Kconfig to define the number of IOAPICs

Define the number of IOAPICs in a Kconfig to get rid of
AmdGetValue calls being not conformant to AGESA API.

Change-Id: I532597dd326093455358a23aef3b3ea0d0a14f75
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Michał Żygowski 2019-11-23 19:02:19 +01:00 committed by Patrick Georgi
parent 1fa240a3c5
commit e719288a3c
4 changed files with 16 additions and 38 deletions

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@ -27,7 +27,6 @@
#include <cpu/cpu.h>
#include <Porting.h>
#include <AGESA.h>
#include <FieldAccessors.h>
#include <Topology.h>
#include <cpu/x86/lapic.h>
#include <cpu/amd/msr.h>
@ -798,21 +797,12 @@ static void cpu_bus_scan(struct device *dev)
int siblings = 0;
unsigned int family;
u32 modules = 0;
VOID* modules_ptr = &modules;
BUILD_OPT_CFG* options = NULL;
int ioapic_count = 0;
// TODO Remove the printk's.
printk(BIOS_SPEW, "KaveriPI Debug: Grabbing the AMD Topology Information.\n");
AmdGetValue(AMD_GLOBAL_USER_OPTIONS, (VOID**)&options, sizeof(options));
AmdGetValue(AMD_GLOBAL_NUM_MODULES, &modules_ptr, sizeof(modules));
modules = *(u32*)modules_ptr;
ASSERT(modules > 0);
ASSERT(options);
ioapic_count = (int)options->CfgPlatNumIoApics;
ASSERT(ioapic_count > 0);
printk(BIOS_SPEW, "KaveriPI Debug: AMD Topology Number of Modules (@0x%p) is %d\n", modules_ptr, modules);
printk(BIOS_SPEW, "KaveriPI Debug: AMD Topology Number of IOAPICs (@0x%p) is %d\n", options, (int)(options->CfgPlatNumIoApics));
/* For binaryPI there is no multiprocessor configuration, the number of
* modules will always be 1. */
modules = 1;
ioapic_count = CONFIG_NUM_OF_IOAPICS;
dev_mc = pcidev_on_root(DEV_CDB, 0);
if (!dev_mc) {

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@ -27,7 +27,6 @@
#include <cpu/cpu.h>
#include <Porting.h>
#include <AGESA.h>
#include <FieldAccessors.h>
#include <Topology.h>
#include <cpu/x86/lapic.h>
#include <cpu/amd/msr.h>
@ -796,17 +795,12 @@ static void cpu_bus_scan(struct device *dev)
int siblings = 0;
unsigned int family;
u32 modules = 0;
VOID* modules_ptr = &modules;
BUILD_OPT_CFG* options = NULL;
int ioapic_count = 0;
AmdGetValue(AMD_GLOBAL_USER_OPTIONS, (VOID**)&options, sizeof(options));
AmdGetValue(AMD_GLOBAL_NUM_MODULES, &modules_ptr, sizeof(modules));
modules = (*(u32 *)modules_ptr) & ((1ull << (sizeof(modules) * 8)) - 1);
ASSERT(modules > 0);
ASSERT(options);
ioapic_count = (int)options->CfgPlatNumIoApics;
ASSERT(ioapic_count > 0);
/* For binaryPI there is no multiprocessor configuration, the number of
* modules will always be 1. */
modules = 1;
ioapic_count = CONFIG_NUM_OF_IOAPICS;
dev_mc = pcidev_on_root(DEV_CDB, 0);
if (!dev_mc) {

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@ -29,7 +29,6 @@
#include <cpu/cpu.h>
#include <Porting.h>
#include <AGESA.h>
#include <FieldAccessors.h>
#include <Topology.h>
#include <cpu/x86/lapic.h>
#include <cpu/amd/msr.h>
@ -1031,21 +1030,12 @@ static void cpu_bus_scan(struct device *dev)
int siblings = 0;
unsigned int family;
u32 modules = 0;
VOID* modules_ptr = &modules;
BUILD_OPT_CFG* options = NULL;
int ioapic_count = 0;
// TODO Remove the printk's.
printk(BIOS_SPEW, "MullinsPI Debug: Grabbing the AMD Topology Information.\n");
AmdGetValue(AMD_GLOBAL_USER_OPTIONS, (VOID**)&options, sizeof(options));
AmdGetValue(AMD_GLOBAL_NUM_MODULES, &modules_ptr, sizeof(modules));
modules = *(u32*)modules_ptr;
ASSERT(modules > 0);
ASSERT(options);
ioapic_count = (int)options->CfgPlatNumIoApics;
ASSERT(ioapic_count > 0);
printk(BIOS_SPEW, "MullinsPI Debug: AMD Topology Number of Modules (@0x%p) is %d\n", modules_ptr, modules);
printk(BIOS_SPEW, "MullinsPI Debug: AMD Topology Number of IOAPICs (@0x%p) is %d\n", options, (int)options->CfgPlatNumIoApics);
/* For binaryPI there is no multiprocessor configuration, the number of
* modules will always be 1. */
modules = 1;
ioapic_count = CONFIG_NUM_OF_IOAPICS;
dev_mc = pcidev_on_root(DEV_CDB, 0);
if (!dev_mc) {

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@ -54,4 +54,8 @@ config HEAP_SIZE
hex
default 0xc0000
config NUM_OF_IOAPICS
int
default 3
endif # NORTHBRIDGE_AMD_PI