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Documentation/mb/ocp: Update Delta Lake documentation 

Update OCP Delta Lake documentation following OSF (Open System Firmware)
solution reaching DVT exit parity. This alternative host firmware
solution uses FSP/coreboot/Linuxboot stack.

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Ifd6ab251cd7806cf8cd3f984ad88c091f85035cf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Jonathan Zhang 2021-03-25 12:24:59 -07:00 committed by Patrick Georgi
parent a346fd943f
commit e73bae7b0a
1 changed files with 38 additions and 30 deletions
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68
Documentation/mainboard/ocp/deltalake.md
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@ -1,8 +1,7 @@
# OCP Delta Lake # OCP Delta Lake
This page describes coreboot support status for the [OCP] (Open Compute Project) This page describes coreboot support status for the [OCP] (Open Compute Project)
Delta Lake server platform. This page is updated following each 4-weeks Delta Lake server platform.
build/test/release cycle.
## Introduction ## Introduction
@ -12,22 +11,23 @@ Yosemite-V3. Both were announced by Facebook and Intel in [OCP virtual summit 20
Delta Lake server is a single socket Cooper Lake Scalable Processor (CPX-SP) server. Delta Lake server is a single socket Cooper Lake Scalable Processor (CPX-SP) server.
Yosemite-V3 has multiple configurations. Depending on configurations, it may Yosemite-V3 has multiple configurations. Depending on configurations, it may
host up to 4 Delta Lake servers in one sled. host up to 4 Delta Lake servers (blades) in one sled.
The Yosemite-V3 program is in PVT phase. Facebook, Intel and partners The Yosemite-V3 system is in mass production. Facebook, Intel and partners
jointly develop FSP/coreboot/LinuxBoot stack on Delta Lake as an alternative jointly develop Open System Firmware (OSF) solution on Delta Lake as an alternative
solution. This development reached EVT exit equivalent status. solution. The OSF solution is based on FSP/coreboot/LinuxBoot stack. The
OSF solution reached DVT exit equivalent status.
## Required blobs ## Required blobs
This board currently requires: Delta Lake server OSF solution requires:
- FSP blob: The blob (Intel Cooper Lake Scalable Processor Firmware Support Package) - FSP blob: The blob (Intel Cooper Lake Scalable Processor Firmware Support Package)
is not yet available to the public. It will be made public some time after the MP is not yet available to the public. It will be made public soon by Intel
(Mass Production) of CPX-SP. with redistributable license.
- Microcode: Available through github.com:otcshare/Intel-Generic-Microcode.git. - Microcode: Available through github.com:otcshare/Intel-Generic-Microcode.git.
- ME binary: Ignition binary will be made public some time after the MP - ME binary: Ignition binary will be made public soon by Intel with
of CPX-SP. redistributable license.
- ACM binaries: only required for CBnT enablement. - ACM binaries: only required for CBnT enablement. Available under NDA with Intel.
## Payload ## Payload
- LinuxBoot: This is necessary only if you use LinuxBoot as coreboot payload. - LinuxBoot: This is necessary only if you use LinuxBoot as coreboot payload.
@ -61,13 +61,13 @@ VPD variables supported are:
- bmc_bootorder_override: When it's set to 1 IPMI OEM command can override boot - bmc_bootorder_override: When it's set to 1 IPMI OEM command can override boot
order. The boot order override is done in the u-root LinuxBoot payload. order. The boot order override is done in the u-root LinuxBoot payload.
- systemboot_log_level: u-root package systemboot log levels, would be mapped to - systemboot_log_level: u-root package systemboot log levels, would be mapped to
quiet/verbose in systemboot as that is all we have for now. 5 to 8 would be mapped quiet/verbose in systemboot as that is all we have for now. 5 to 8 would be
to verbose, 0 to 4 and 9 would be mapped to quiet. mapped to verbose, 0 to 4 and 9 would be mapped to quiet.
- DeltaLake specific VPDs: check mb/ocp/deltalake/vpd.h. - VPDs affecting coreboot are listed/documented in src/mainboard/ocp/deltalake/vpd.h.
## Working features ## Working features
The solution is developed using LinuxBoot payload with Linux kernel 5.2.9, and [u-root] The solution is developed using LinuxBoot payload with Linux kernel 5.2.9,
as initramfs. and [u-root] as initramfs.
- SMBIOS: - SMBIOS:
- Type 0 -- BIOS Information - Type 0 -- BIOS Information
- Type 1 -- System Information - Type 1 -- System Information
@ -96,11 +96,14 @@ as initramfs.
- TPM - TPM
- Bootguard profile 0T - Bootguard profile 0T
- TXT - TXT
- SRTM (verified through tboot) - SRTM
- memory secret clearance upon ungraceful shutdown - DRTM (verified through tboot)
- unsigned KM/BPM generation
- KM/BPM signing
- memory secret clearance upon ungraceful shutdown
- Early serial output - Early serial output
- port 80h direct to GPIO - port 80h direct to GPIO
- ACPI tables: APIC/DMAR/DSDT/FACP/FACS/HPET/MCFG/SPMI/SRAT/SLIT/SSDT - ACPI tables: APIC/DMAR/DSDT/EINJ/FACP/FACS/HEST/HPET/MCFG/SPMI/SRAT/SLIT/SSDT
- Skipping memory training upon subsequent reboots by using MRC cache - Skipping memory training upon subsequent reboots by using MRC cache
- BMC crash dump - BMC crash dump
- Error injection through ITP - Error injection through ITP
@ -109,13 +112,13 @@ as initramfs.
- Check Microcode version: cat /proc/cpuinfo | grep microcode - Check Microcode version: cat /proc/cpuinfo | grep microcode
- Devices: - Devices:
- Boot drive - Boot drive
- NIC card
- All 5 data drives - All 5 data drives
- NIC card
- Power button - Power button
- localboot - localboot
- netboot from IPv6 - netboot from IPv6
- basic memory hardware error injection/detection (SMI handler not upstreamed) - basic memory hardware error injection/detection (SMI handlers not upstreamed)
- basic PCIe hardware error injection/detection (SMI handler not upstreamed) - basic PCIe hardware error injection/detection (SMI handlers not upstreamed)
## Stress/performance tests passed ## Stress/performance tests passed
- OS warm reboot (1000 cycles) - OS warm reboot (1000 cycles)
@ -125,27 +128,32 @@ as initramfs.
- StressAppTest (6 hours) - StressAppTest (6 hours)
- Ptugen (6 hours) - Ptugen (6 hours)
## Performance tests on par with traditional firmware ## Performance on par with traditional firmware
- coremark - coremark
- SpecCPU
- Linkpack
- Iperf(IPv6)
- FIO - FIO
- Iperf(IPv6)
- Linpack
- Intel MLC (memory latency and bandwidth)
- SpecCPU
- stream
## Other tests passed ## Other tests passed
- Power - Power
- Thermal - Thermal
- coreboot address sanitizer (both romstage and ramstage)
- Intel selftest tool (all errors analyzed; applicable errors clean)
## Known issues ## Known issues
- MLC (Intel Memory Latency Check) and stream performance issue
- HECI access at OS run time: - HECI access at OS run time:
- spsInfoLinux64 command fail to return ME version - spsInfoLinux64 command fail to return ME version
- ptugen command fail to get memory power - ptugen command fail to get memory power
- CLTT (Closed Loop Thermal Throttling, eg. thermal protection for DIMMs)
- ProcHot (thermal protection for processors)
## Feature gaps ## Feature gaps
- flashrom command not able to update ME region - flashrom command not able to update ME region
- ACPI APEI tables - ACPI BERT table
- PCIe hotplug, Virtual Pin Ports - PCIe hotplug through VPP (Virtual Pin Ports)
- PCIe Live Error Recovery - PCIe Live Error Recovery
- RO_VPD region as well as other RO regions are not write protected - RO_VPD region as well as other RO regions are not write protected
- Not able to selectively enable/disable core - Not able to selectively enable/disable core