Documentation/mb/sifive: Update TODO list; UART driver has been merged
See 894e3a9ec8
("drivers/uart: Add a driver for SiFive's UART").
Change-Id: I035c238beba28ecafd296f18c0ccda167126ab94
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/27398
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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@ -12,7 +12,6 @@ For general setup instructions, please refer to the [Getting Started Guide].
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The following things are still missing from this coreboot port:
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- Trampoline in the MBR block to support boot mode 1
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- SiFive UART driver
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- CBMEM support
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- FU540 clock configuration
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- FU540 RAM init
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