From e771b9a65fe668bd04dd8dbdab8af4819a987d95 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 30 Nov 2021 21:03:14 +0100 Subject: [PATCH] cpu/x86/mp.h: Implement a pre-SSE2 mfence MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Taken from the Linux Kernel. Tested: Qemu using '-cpu pentium3' now boots. Change-Id: I376f86f4d7992344dd68374ba67ad3580070f4d8 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/59766 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/include/cpu/x86/mp.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/include/cpu/x86/mp.h b/src/include/cpu/x86/mp.h index 8105477c49..aea3ca1e3d 100644 --- a/src/include/cpu/x86/mp.h +++ b/src/include/cpu/x86/mp.h @@ -13,7 +13,11 @@ struct bus; static inline void mfence(void) { - __asm__ __volatile__("mfence\t\n": : :"memory"); + /* mfence came with the introduction of SSE2. */ + if (CONFIG(SSE2)) + __asm__ __volatile__("mfence\t\n": : :"memory"); + else + __asm__ __volatile__("lock; addl $0,0(%%esp)": : : "memory"); } /* The sequence of the callbacks are in calling order. */